Infineon Technologies Ag

Khaled Fekih-Romdhane

Klaus Hummler

Johann Pfeiffer

Wolfgang Hokenmaier

Skip Shizhen Liu

Peter Chlumecky

Methods and apparatus for increasing front-end testing throughput by allowing simultaneous access to multiple banks are provided. Techniques described herein take advantage of the reduced number of data lines required for transmitting compressed test data. Data lines effectively freed up due to compression of test data read from one bank may be used to carry test data for another bank.

Parallel read for front end compression mode

Techniques and circuitry for transferring data from memory arrays of a memory device to output pins via a FIFO structure are provided. Input and output stages of the FIFO structure may be operated independently, allowing data to be loaded into the FIFO structure at a first frequency and unloaded from the FIFO structure at a second frequency.

Dual frequency first-in-first-out structure

A method of controlling an internal address counter which provides a count used in accessing a storage cell array to provide increased flexibility in the performance of a test on the array, comprising, rendering a normal overflow condition of the counter modified, thereby enabling alteration of the count provided by the counter in accordance with the requirements of the test being performed on the array.

Flexible internal address counting method and apparatus

A memory circuit comprises a memory and an internal column counter for a read sequence in a compression test mode of the memory. The memory comprises an array of memory cells. The internal column counter is configured to provide a first column address for generating a compression register of expected data to compare to data read from the array of memory cells in response to a first read command, latch a second column address in response to a second read command while the first read command is executing, and provide the second column address for generating the compression register of expected data to compare to data read from the array of memory cells in response to the second read command once execution of the first read command is completed.

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Houston, TX, United States of America

Khaled Fekih-Romdhane