Cypress Semiconductor Corporation

Khaldoon S Abugharbieh

Roger J Bettman

Sung-Ki Min

S Babar Raza

Timothy M Lacey

Anita X Meng

Donald Y Yu

Donald A Krall

The present invention provides an integrated parallel and serial programming interface that can be selected between either a parallel programming mode or a serial programming mode. The present invention provides a control logic circuit for selecting between the parallel and serial modes. The present invention also includes a parallel and serial detection circuit. The control logic sends a signal to an interface circuit that selects between a serial programming mode and a parallel programming mode based on the outputs of the parallel and serial detection circuits.

Design architecture for a parallel and serial programming interface

A circuit and method configured to generate a variable impedance. The circuit may comprise a voltage controlled resistor configured to generate the variable impedance in response to (i) a first transistor configured to receive a first control signal and (ii) a bias transistor configured to receive a bias signal. In one example, the variable impedance may be generated in further response to a clamp transistor.

Circuit and method for controlling an output of a ring oscillator

A circuit comprising an oscillator configured to generate a periodic signal in response to (i) control signal and (ii) a current. The current may be varied independently of the control signal. In one example, the oscillator may generate the periodic signal in further response to a second current that may vary in response to the control signal. In another example, the oscillator may be used in a phase-locked loop circuit.

Method, circuit and/or architecture to improve the frequency range of a voltage controlled oscillator

A nonvolatile memory circuit that includes a load circuit coupled to a band-gap reference circuit and a nonvolatile memory cell. The load line circuit is configured to provide a programming voltage to the nonvolatile memory cell. The programming voltage may be generated in response to the reference voltage generated by the band-gap reference circuit. The nonvolatile memory circuit may also include an amplifying circuit that amplifies the reference voltage of the band-gap circuit, and provides the amplified reference voltage to the load circuit. The nonvolatile memory circuit may further include a voltage trim circuit that trims the amplified reference voltage and provides the trimmed amplified reference voltage to the load circuit. The reference voltage, amplified reference voltage, and the trimmed amplified reference voltage may each output a stable voltage that is independent of variations in process parameters, operating temperatures, and supply voltages of the nonvolatile memory circuit.

Stable adjustable programming voltage scheme

A voltage source is configured to produce a desired voltage and the desired voltage is applied to a programmable cell coupled to the voltage source. Configuration may be accomplished by loading a register with a programmed voltage value which may be received as a serial data stream through a test access port coupled to the register. For one embodiment, the voltage source may be coupled to a gate of the programmable cell, thus allowing testing of margin voltages of the programmable cell. In a further embodiment, the voltage source may be coupled to a drain of the programmable cell through a load line circuit, thus providing a programmed voltage for the programmable cell. In general then, the programmable voltage source is configurable to provide a voltage to the programmable cell in accordance with a programmed voltage value loaded into the programmable voltage source. The present invention may be embodied in a programmable device such as a PLD a CPLD or an FPGA and provides easily adjustable verify and/or program voltages, configurable through use of the programmable register, to test the operation of the programmable cell. The higher the bit count of the register, the more precise a verify and/or program voltage that may be provided.

Growing community of inventors

Sunnyvale, CA, United States of America

Khaldoon S Abugharbieh