Taiwan Semiconductor Manufacturing Comp. Ltd.

Khaderbad Mrunal Abhijith

Keng-Chu Lin

Yu-Yun Peng

Fu-Ting Yen

Tzer-Min Shen

Tsu-Hsiu Perng

Chen-Han Wang

Dhanyakumar Mahaveer Sathaiya

Tsu-hsiu Perng

Chen-han Wang

The present disclosure provides an interconnect structure and a method for forming an interconnect structure. The method for forming an interconnect structure includes forming a first interlayer dielectric (ILD) layer over a substrate, forming a contact in the first ILD layer, forming a second ILD layer over the first ILD layer, forming a first opening in the second ILD layer and obtaining an exposed side surface of the second ILD layer over the contact, forming a densified dielectric layer at the exposed side surface of the second ILD layer, including oxidizing the exposed side surface of the second ILD layer by irradiating a microwave on the second ILD layer, and forming a via in contact with the densified dielectric layer.

Interconnect structure and method for manufacturing the interconnect structure

Semiconductor devices and methods of forming the same are provided. A method includes providing a workpiece having a semiconductor structure; depositing a two-dimensional (2D) material layer over the semiconductor structure; forming a source feature and a drain feature electrically connected to the semiconductor structure and the 2D material layer, wherein the source feature and drain feature include a semiconductor material; and forming a gate structure over the two-dimensional material layer and interposed between the source feature and the drain feature. The gate structure, the source feature, the drain feature, the semiconductor structure and the 2D material layer are configured to form a field-effect transistor. The semiconductor structure and the 2D material layer function, respectively, as a first channel and a second channel between the source feature and the drain feature.

2D-channel transistor structure with source-drain engineering

2d-channel transistor structure with source-drain engineering

The present disclosure provides an interconnect structure, including a substrate having a conductive region adjacent to a gate region, a contact over the conductive region, a first interlayer dielectric layer (ILD) surrounding the contact, a via over the contact, a first densified dielectric layer surrounding the via, wherein the densified dielectric layer has a first density, and a second ILD layer over the first ILD layer and surrounding the via, wherein the second ILD layer has a second density, the first density is greater than a second density.

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Hsinchu, Taiwan

Khaderbad Mrunal Abhijith