Hewlett-packard Company

Other

Kevin W Keirn

David T Crook

Ugur Cilingiroglu

Ronald J Peiffer

Kenneth E Posse

Vance R Harwood

George L Booth

Michael A Lassner

John J Keller

Disclosed is a system that determines whether input and output pins of semiconductor components are present and properly soldered to a circuit assembly. The system includes an oscillator which is connected to a probe that is brought into contact with a circuit assembly wiring trace soldered to the pin being tested. A conductive electrode is placed on top of the component and connected to a capacitance measuring circuit. The oscillator signal is capacitively coupled through the integrated circuit package to the pin being tested, so if capacitance is measured by the capacitance measuring device, the pin is connected to the circuit assembly. An amplifier may be connected to the conductive electrode to amplify the signal, and a segmented probe may be used to isolate individual pins. The probe may be shielded, and unused pins may be grounded.

Identification of pin-open faults by capacitive coupling

Disclosed is a system that determines whether pins of electrical components such as connectors, switches, and sockets are present and properly soldered to a printed circuit board. The system uses an oscillator which supplies a signal, typically ten kilohertz (10 kHz) at 0.2 volts, to the pin under test. A conductive electrode is placed on top of the component. The electrode is connected to a current measuring device. Another pin of the component is connected to a common signal return.

System for measuring the integrity of an electrical contact

Disclosed is a system that determines whether input and output pins of semiconductor components are present and properly soldered to a printed circuit board. The system uses an oscillator which supplies a signal, typically ten kilohertz (10 kHz) at 0.2 volts, to the pin under test. A conductive electrode is placed on top of the component package. The electrode is connected to a current measuring device. Another pin of the component is connected to the common signal return. Typically the other pin is chosen to be a power or ground pin of the component.

Identification of pin-open faults by capacitive coupling through the

Disclosed is a system that determines whether input and output pins of semiconductor components are present and properly soldered to a printed circuit board. The system uses an oscillator which supplies a signal, typically ten kiloHertz (10 kHz) at 0.2 volts, to the pin under test. A conductive electrode is placed on top of the component package. The electrode is connected to a current measuring device. Another pin of the component is connected to the common signal return. Typically the other pin is chosen to be a power or ground pin of the component.

Disclosed is a system for determining whether semiconductor components are present and properly connected to a printed circuit board. The semi-conductor material between two pins of an integrated circuit forms a lateral NPN transistor, having its base connected directly to the substrate connection pin of the component. A constant voltage source is applied to the lateral transistor collector pin of the component being tested, and allowed to stabilize. A current or voltage source is then connected to the emitter pin of the lateral transistor, typically an adjacent pin, and a current or voltage pulse is applied to this pin. The current on the collector pin is then monitored and if a corresponding current pulse is detected, the emitter and collector pins, as well as the substrate connection pin of the component, are properly connected to the printed circuit board.

Integrated circuit transfer test device system utilizing lateral

Disclosed is a method for compressing sequences of data-vectors, which sequences are to be used for testing circuit boards with the aid of a circuit board testing machine. The method involves an initial compression of the data-vector sequence followed by a so-called K-T transformation of the remaining data-vectors. The initial compression involves eliminating redundant data-vectors from the initial sequence and retaining only the unique data-vectors together with sequencing information indicating where in the initial sequence each unique-data vector occurred. The K-T transformation involves a bitwise logical exclusive-OR operation (XOR) whereby the remaining data-vector sequence is K-T transformed thereby further compressing the sequence without losing any of the original sequence information.

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Loveland, CO, United States of America

Kevin W Keirn