International Business Machines Corporation

Endicott Interconnect Technologies, Inc.

Kevin Taylor Knadle

Andrew Michael Seman

Frank Daniel Egitto

Charles Gerard Woychik

David V Caletka

Anilkumar Chinuprasad Bhatt

John Joseph Konrad

Amit Kumar Sarkhel

Edmond Otto Fey

Timothy Leroy Wells

Richard Allen Day

Jeffrey McKeveny

Joseph Alphonse Kotylo

Edward Lee Arrington

Kristen Ann Stauffer

Jose A Rios

William Louis Brodsky

John M Lauffer

David John Russell

Douglas Oliver Powell

Anita Sargent

A method of making the circuitized substrate. The circuitized substrate includes a substrate having a substantially planar upper surface and a conductive layer positioned on the substantially planar upper surface. The conductive layer includes at least one side wall therein, defining an opening in the conductive layer. The conductive layer includes an end portion spaced from the opening, the end portion forming an acute angle with the substantially planar upper surface of the substrate. The at least one side wall is substantially perpendicular to the substantially planar upper surface of the substrate.

Method of making a circuitized substrate

A method of making a circuitized substrate. A conductive layer having a substantially planar upper surface is formed on and in direct mechanical contact with an upper surface of a substrate. A portion of the conductive layer is removed to form an interim side wall in the conductive layer. A layer of patternable material is formed on the substantially planar upper surface and on the interim side wall. A portion of the layer of patternable material on the conductive layer is removed to expose the interim side wall. A portion of the substantially planar upper surface is removed to form a side wall in the layer of patternable material. Portions of the interim side wall in the conductive layer are removed to form a second side wall and a bottom wall defined by the upper surface of the substrate. The second side wall is substantially perpendicular to the bottom wall.

A printed wiring board is formed from two or more layers, one of which has circuit lines formed thereon, and wherein the surfaces of the circuit lines are roughened only in areas that require good copper to laminate adhesion. The remainder of the circuit line surfaces are smooth. Thus, those areas for propagation of the signal on signal lines have the circuit lines smooth to maximize the signal propagation effect, while those areas where the signal propagation is not critical are rough, which improves the adhesion of one layer to another. On the voltage planes, the surface in those regions opposite the smooth surfaces of the signal planes is smooth. Thus, these areas of the voltage planes can be maintained smooth while the other areas of the surface of the voltage planes can be roughened, providing good adhesion to the adjoining dielectric material.

Selectively roughening conductors for high frequency printed wiring boards

A circuitized substrate and a method of making the circuitized substrate is provided. The circuitized substrate includes a substrate having a substantially planar upper surface and a conductive layer positioned on the substantially planar upper surface. The conductive layer includes at least one side wall therein, defining an opening in the conductive layer. The conductive layer includes an end portion spaced from the opening, the end portion forming an acute angle with the substantially planar upper surface of the substrate. The at least one side wall is substantially perpendicular to the substantially planar upper surface of the substrate.

A test apparatus for testing circuitized substrates such as PCB test coupons for thru-hole failure in which the substrate may be cooled to a temperature less than the ambient temperature surrounding the test apparatus housing in which the testing is accomplished. A method of testing substrates is also provided.

Substrate test apparatus and method of testing substrates

A process by which high frequency printed wiring board construction can be fabricated using smooth copper surfaces. A conductive, thin film polymer is plated on smooth copper surfaces of a core lamination. The polymer can be selected from a group of materials consisting of polypyrrole, polyaniline, polythiophene, and combinations thereof. The conductive polymer promotes adhesion between the resin polymer of the laminate and the smooth copper surfaces.

Treating copper surfaces for electronic applications

A method of fabricating a printed circuit device including an electrically insulating substrate, and first, second, and third sets of conductors formed on a top surface of the substrate is disclosed. The method includes forming an oxide layer on the set of second conductors; forming a solder mask on the oxide layer; forming a composite layer on the first set of conductors; and forming a solder layer on at least a portion of the third set of conductors.

Method of fabricating printed circuit board with mixed metallurgy pads

Fine line circuitization

A method and an arrangement for measuring the cooling rate and temperature differential between the top and bottom surfaces of a printed circuit board. The method is intended to facilitate control over the temperature differential which is encountered between the top and bottom of the printed circuit board so as to prevent warpage thereof during the formation of solder joints in a reflow solder oven.

Method for producing a reliable solder joint interconnection

Printed circuit board with mixed metallurgy pads and method of fabrication

A printed wiring board having a layered composite of metal planes and dielectric layers. At least one of the dielectric layers has a modulus lower than the modulus of the remaining dielectric material layers. A plating, extending through the layered composite, has a first land on a first external surface of the layered composite, a second land on a second external surface of the layered composite, and a barrel extending between the first land and the second land. The lower modulus dielectric material layer deforms during thermal excursions of the printed wiring board in such a way as to reduce the strains imposed on both the lands and the barrel of the plated through holes.

Printed wiring board with improved plated through hole fatigue life

A method and an arrangement for measuring the cooling rate and thermal gradient between the top and bottom surfaces of a printed circuit board. Moreover, it is intended to facilitate control over the temperature gradient which is encountered between the top and bottom of the PCB so as to prevent warpage thereof during the formation of solder joints in a reflow solder oven.

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Endicott, NY, United States of America

Kevin Taylor Knadle