Spansion Llc.

Cypress Semiconductor Corporation

Advanced Micro Devices Corporation

Kevin Song

Fei Wang

Steven C Avanzino

Sameer S Haddad

Suzette Keefe Pangrle

Bryan K Choo

Manuj Rathor

James J Xie

Michael Vanbuskirk

Christie Marrian

Jeffrey Allan Shields

Angela Tai Hui

Kuo-Tung Chang

Hiroyuki Kinoshita

Mark S Chang

Ning Cheng

Kyunghoon Min

Jeffery A Shields

Brian Osborn

James Xie

A present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening, providing a switching body in the opening, the first conductive body and switching body filling the opening, and providing a second conductive body over the switching body. In an alternate embodiment, a second dielectric layer is provided over the first-mentioned dielectric layer, and the switching body is provided in an opening in the second dielectric layer.

Damascene metal-insulator-metal (MIM) device with improved scaleability

The present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening in the dielectric layer, providing a switching body in the opening, and providing a second conductive body in the opening.

Damascene metal-insulator-metal (MIM) device

A method for manufacturing a semiconductor device including selective conductive contacts includes the step of depositing a resist over first and second memory device components, each of the first and second components comprising junctions formed in the substrate and a gate formed on the substrate between the junctions. The resist is then removed from the second components to thereby form a resist opening above each of the second component control gates and junctions. The resist is then etched to thereby expose each of the first component control gates but not the substrate surrounding the first component control gates. Conductive contacts are then formed on the exposed first component control gates, and the second component control gates and junctions.

Selective contact formation using masking and resist patterning techniques

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Santa Clara, CA, United States of America

Kevin Song