Efficient Networks, Inc.

Kevin S Dibble

Klaus S Fosmark

William A Perry

Kenneth A Lauffenberger

Chase B Bailey

Clyde Musgrave

Wayne Daniel

Christopher Q Eckert

A network interface device includes a first interface operable to receive at least two incoming calls over a subscriber line, and a second interface operable to facilitate communication between the first interface and a first telephone line and between the first interface and a second telephone line. The second interface is also operable to generate one or more first ring voltages on the first telephone line and one or more second ring voltages on the second telephone line. The network interface device also includes a processor coupled to the first interface and the second interface. The processor is operable to instruct the second interface to generate the first and second ring voltages in response to receiving the incoming calls. The processor is also operable to allocate the first and second ring voltages among the first and second telephone lines to ensure that a total instantaneous load placed on the second interface does not exceed a determined threshold level.

Network interface device and method

An ATM adapter for desktop applications includes an adapter for interfacing an ATM network. The adapter includes an ATM application specific integrated circuit (ASIC). The ATM ASIC may interface with a data bus such as an SBus using a host interface circuit. The host interface circuit includes a bus interface, a DMA controller and a slave access controller. The DMA controller controls DMA operations within the ATM ASIC and associates with a RAM interface arbiter. The slave access controller controls operation of an interrupt circuit that goes to the SBus as well as a statistics circuit. The RAM interface arbiter arbitrates communication between the DMA controller, the slave access control circuit, a segmentation engine, and a reassembly engine. The RAM interface arbiter communicates with the RAM bus to a RAM associated with an adapter. The segmentation engine segments data into ATM format for transfer through a physical interface circuit. The physical interface circuit also receives formatted ATM information and sends that information to the reassembly engine. The reassembly engine reassembles the ATM data and transmits it through the RAM interface/arbiter circuit to the RAM bus. From the RAM bus, data may pass again through the RAM interface/arbiter to the DMA controller and onto the SBus through the host bus interface.

Asynchronous transfer mode adapter for desktop applications

A multiple mode xDSL interface (60) is disclosed. The multiple mode xDSL interface (60) includes an xDSL termination unit (62) operable to couple to an XDSL link (64) and to manage communication of data across an xDSL physical layer. The mulitple mode xDSL interface (60) also includes a customer premises equipment (CPE) termination unit (65) coupled to the xDSL termination unit (62) and operable to couple to customer premises equipment. The CPE termination unit (65) has an operating mode selected from a plurality of operating modes where each operating mode is associated with a data protocol and supports communication of data across the xDSL physical layer using the associated data protocol.

Multiple mode xDSL interface

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Carrollton, TX, United States of America

Kevin S Dibble