Intel Corporation

Kevin R Weldon

Chia-Hong Jan

Robert S Chau

Leopoldo D Yau

Paul A Packan

Chan-Hong Chern

Anand S Murthy

Ebrahim Andideh

A novel transistor with a low resistance ultra shallow tip region and its method of fabrication. The novel transistor of the present invention has a source/drain extension or tip comprising an ultra shallow region which extends beneath the gate electrode and a raised region.

Transistor with ultra shallow tip and method of fabrication

The present invention describes an MOS device having deposited silicon regions and its a method of fabrication. In one embodiment of the present invention a substrate having a thin oxide layer formed on a silicon surface is heated and exposed to an ambient comprising germane (GeH,) to remove the thin oxide from the silicon surface. A silicon or silicon alloy film can then be deposited onto the silicon surface of the substrate.

Semiconductor device having deposited silicon regions and a method of fabrication

A novel transistor with a low resistance ultra shallow tip region and its method of fabrication. The novel transistor of the present invention has a source/drain extension or tip region comprising an ultra shallow region which extends beneath the gate electrode and a raised region.

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Portland, OR, United States of America

Kevin R Weldon