Cortina Systems Corporation

Inphi Corporation

Zarbana Digital Fund LLC

Kevin Parker

Stephane Dallaire

Shawn Lawrence Scouten

Malcolm Stevens

Lawrence Tse

Johan M Grundlingh

Brian Wall

Kenji Suzuki

Florin Pera

Jeff P Kirsten

An optical receiver that recovers data is disclosed. The optical receiver includes a photodetector configured to convert an optical signal into a current signal, and a TIA (Transimpedance Amplifier) configured to operate according to a set of parameters to convert the current signal to a voltage signal. The optical receiver also includes an equalizer configured to process the voltage signal to produce a processed signal having recovered data from the optical signal, and to produce one or more equalization metrics. According to an embodiment of the disclosure, the optical receiver has a feedback processor configured to automatically tune operation of the TIA by adjusting at least one of the parameters of the TIA based on the one or more equalization metrics. This may effect a change in performance or power consumption of the optical receiver while receiving and recovering data. A corresponding method for recovering data is also disclosed.

Apparatus and method for recovering data at an optical receiver with automatic tuning

Integrated jitter compliant clock signal generation apparatus and methods are provided. Input signals having different frequencies are used to generate respective clock signals having closely spaced frequencies. The input signals might be generated, for example, in adjacent Phase Locked Loops (PLLs) which receive reference clock signals. The reference clock signals, or signals from which the reference clock signals originate, are also closely spaced. The closely spaced reference clock signals are effectively separated for cleanup and then brought back together to provide the closely spaced clock signals. This allows cleanup of the closely spaced reference clock signals to occur at staggered and more widely spaced frequencies. These techniques could also be applied to reference clock signals which are harmonically related and are used to generate harmonically related output clock signals.

Integrated jitter compliant clock signal generation

A phase difference between a reference clock signal and a feedback signal is digitally detected. A resultant phase detection signal is digitally filtered, and a PLL (Phase Locked Loop) output signal is synthesized in a fractional synthesizer under control of the digitally filtered phase detection signal. A feedback path, which could include an integer divider and/or a fractional N divider, provides the feedback signal based on the PLL output signal. The combination of a wide bandwidth fractional synthesizer and a low bandwidth digital PLL provides for a low bandwidth jitter filtering function with a wide bandwidth PLL to suppress VCO (Voltage Controlled Oscillator) noise and crosstalk.

Integrated jitter compliant low bandwidth phase locked loops

Embodiments of the present invention comprise methods and devices for amplifying a signal by amplifying a first signal and by then amplifying a second signal only if the first signal exceeds a predetermined threshold. The first and second amplified signals are then combined, and the combination is fed back to a signal source and used to control the values of the first and second signal. The combination is further transmitted to a load. In the preferred embodiment, the first amplified signal is transmitted through an impedance inverter before it is combined with the second amplified signal.

Power amplifier

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Nepean, Canada

Kevin Parker