Honeywell G.m.b.h.

Honeywell International Inc.

Other

Honeywell Information Systems Inc.

Kevin P Staggs

Alexander Chernoguzov

Charles J Clarke, Jr

Laurence A Clawson

Thomas R Markham

James C Huntington

David L Phillips

Marion Mark Cherry

Geoffrey Allen Lowe

Wayne C Kahn

Kevin Peter Vlasich

Tina M Rodrigo

Paul F Mclaughlin

Julie J Hull Roskos

A distributed intrusion detection system (IDS) is provided. The IDS includes, but is not limited to: a plurality of IDS sensors distributed in internet of things (IoT) devices; and a server, coupled to the plurality of IDS sensors through a network, where the plurality of IDS sensors is configured to collect event data from the IoT devices, and the server is configured to: receive the collected event data from the plurality of IDS sensors; determine if an intrusion event occurs by correlating and analyzing the collected event data; and generate an alert in an instance in which the intrusion event occurs.

Distributed intrusion detection systems (IDS) and methods for internet of things (IoT) devices

Devices, methods, and systems for assured pipeline threat detection are described herein. One method for assured pipeline threat detection includes receiving a first set of data at a firewall from an unsecured network, moving the first set of data from the firewall to a number of virtual machines, performing a number of threat detection analyses on the first set of data in the number of virtual machines that are organized in a first assured pipeline, and sending the first set of data to a secured target network if no threat was detected.

Assured pipeline threat detection

An interface provides a path to transfer data from a proprietary network to an open system. The proprietary network includes at least one module central processing unit (CPU) and a module memory associated therewith operatively connected to the proprietary network. A shared memory and shared memory logic are interposed between the proprietary network and the open system, thereby forming the data path. The method comprises the steps of accepting requests for data from the open system by a parasitic task function within the module CPU. The data requested of the proprietary network is obtained and placed in a predetermined location of the module memory in a form understandable to the open systems. A pointer value is placed in the shared memory, the pointer value containing the value of the predetermined location of the module memory, the shared memory being mapped in the addressable memory space of the shared memory logic using virtual memory techniques. The data is obtained directly from the module memory utilizing the pointer value corresponding to the data requested, thereby allowing open systems to access the proprietary system while maintaining the integrity of the proprietary network.

Method of coupling open systems to a proprietary network

The method guarantees the integrity of a process control systems display in an open system windows environment. The process control system includes an interface apparatus to at least one foreign system, and receives display information such that the display information from the foreign systems and the display information from a network of the process control system are displayed on a display unit of the process control system in a windows format in response to control information from the interface apparatus. The interface apparatus transmits the display information of the foreign systems to a display generator unit via a first input channel of the display generator unit. Control information is also transmitted to the display generator unit via the first input channel to command a display format to the display generator unit of the display unit. The display format includes a plurality of windows, one of the windows being a control view. The control view (display of the process control system) display information is transmitted to the display generator unit via a second input channel of the display generator unit. Communication checks are made between the display generator unit and the interface apparatus. If an error is detected by either unit, the first input channel is disabled, and the control view is displayed on the entire screen of the display unit and controlled by the display generator unit, thereby guaranteeing the control view is always displayed and the integrity of the process control system is maintained.

Method for controlling window displays in an open systems windows

On-line verification apparatus of a display generation system comprises a memory which has a display portion and an inactive display portion, the display portion storing display information, and the inactive display portion storing test data. Scan logic controls a monitor, the scan logic accessing the memory at a predetermined location corresponding to the position control signals. A generator generates display control information to provide information control signals to the scan beam thereby providing the visual display corresponding to the display information stored in the display portion of the memory. A register stores display control information generated from the test data stored in the inactive display portion of the memory during a retrace period. The display control information stored in the register corresponding to the test data is compared to an expected result, during the retrace period, thereby verifying on-line that the display generation system is functioning correctly.

On-line verification of video display generator

Method and apparatus for generating cursors for display by a color raster graphic system. The cursors displayed can assume any one of a plurality of forms. Each cursor has predetermined boundaries and includes all pixel positions of the raster within its boundaries. One pixel position is designated as the origin of the cursor and selected ones of the pixel positions for each form of the cursor will display the cursor color and intensity. The address of the origin of a cursor and its form are designated by the graphic controller of the system. The address of the origin is compared with the addresses of the pixels produced by the raster scan logic, and, when the same, the form number and the x and y coordinates, the addresses of the pixel positions of the cursor relative to the origin thereof, are produced and applied to a read-only memory which produces cursor control signals stored at the addressed locations of the cursor memory. The cursor control signals are produced in synchronization with the scanning of pixels, the positions of which correspond to selected cursor pixel positions of the cursor and are applied to the color look-up memory of the system. Such pixel control signals cause the color look-up memory to produce color control signals which cause pixels corresponding to a selected cursor pixel positions to be displayed in the cursor color and intensity to produce a cursor having the designated form with the origin of the cursor so produced being located at the designated address of a pixel in the raster.

Method and apparatus for generating cursors for a raster graphic display

A display memory which stores information to be displayed on a raster scan CRT comprises a first storage element for storing dot information, a second storage element for storing behavior information, and a third storage element for storing characteristic information. The first, second, and third storage element are each arranged in an nxm plane where m is an addressable location and each addressable location within each plane has n bits of information. Further, each of the first, second, and third storage elements has address terminals each operatively connected to a display address bus adapted to receive address information from a CPU. Control logic receives address signals, data signals, and control signals from the CPU. The control logic generates enable control signals to selectively enable access to predetermined combinations of said first, second, and third storage elements in response to the address, data, and control signals from the CPU.

Memory access modes for a video display generator

Apparatus for controlling the colors displayed by a raster graphic system. Information stored at each addressable location of a RAM includes a set of behavior bits and a set of control bits. These bits are read out of memory during each memory read cycle. The control bits are stored in a shift register and the behavior bits are applied to an escape code detector and may be stored in a foreground or a background behavior register if enabled by the detector. One control bit is shifted out of the shift register each pixel clock pulse. This control bit determines the register from which the behavior bits are selected to form a color index. The index includes behavior bits from the selected register and the control bit for the pixel being scanned. This index is applied to a color look-up memory which produces color control signals which are applied to D/A converters, the outputs of which control the color and intensity of each pixel of the raster. A certain set of behavior bits, an escape code, causes the detector to inhibit both behavior registers from storing the escape code and enables the background behavior register to store the next set of behavior bits read out of memory. Thereafter the escape code detector enables the foreground register to store behavior bits produced from memory during each memory read cycle until the next escape code is detected.

Apparatus for controlling the background and foreground colors displayed

Method and apparatus for controlling the display of a raster scan color cathode ray tube. The tube is provided with an orthogonal array of picture elements (pixels) with each picture element having a unique binary address. An addressable memory having memory locations with addresses corresponding to those of the picture element has stored in such memory locations an address of a location in a color look-up memory for an alphanumeric color, for a graphic color and priority signals. In the color look-up memory at the addressed locations is stored binary signals representing the color and intensity of a pixel. In synchronism with the raster scan of the picture elements of the cathode ray tube, there is read from the memory graphic color addresses, alphanumeric color addresses and priority signals for each pixel. One of the addresses, either the graphic or alphanumeric, is applied to the color look-up memory, with the address that is applied being determined by the binary priority signals. The binary color signals stored at the addressed color look-up memory location represent varying intensities of a plurality of predetermined colors. The color signals are converted by a digital to analog converter into analog signals which are applied to the color cathode ray tube to control the color and intensity of each pixel as it is scanned.

Method and apparatus for controlling the display of a computer generated

Method and apparatus for filling polygons displayed by a color CRT monitor of a raster graphic system. A graphic controller produces control signals which control the mode of operation of the system, two of which are a fast polygon write, or fast-fill write, mode and a fast polygon display, or display fast-fill, mode. When the system is in the fast polygon write mode, the graphic controller reads fast-fill toggle bits from a frame memory of boundary pixels defining initial and terminal pixels of each fill element. The fast-fill toggle bits of boundary pixels are set if the toggle bit read from memory was not set and, if set, it will reset it. In the fast polygon display mode, the system senses the initial boundary pixel of each fill element by its fast-fill toggle bit being set and applies the color address of the initial boundary pixel to a color look-up memory until the terminal pixel of the fill element is read from the memory. Thereafter, the color address of each pixel of a horizontal scan line is applied to the color look-up memory in synchronization with the raster scan until another initial boundary pixel of another fill element is sensed, etc., or until the end of the horizontal scan line is reached.

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Glendale, AZ, United States of America

Kevin P Staggs