Georgia Tech Research Corporation

Kevin P Martin

James D Meindl

Harry P Gillis

Dmitri A Choutov

Muhannad S Bakir

Paul Albert Kohl

Chirag Suryakant Patel

Thomas K Gaylord

Hollie K Reed

Elias N Glytsis

Stephen M Schultz

Tony Mule′

Timothy J Drabik

Tony Mule&prime;

Hiren D Thacker

John Callahan

Dimitri A Choutov

Optoelectronic probe cards, methods of fabrication, and methods of use, are disclosed. Briefly described, one exemplary embodiment includes an optoelectronic probe card adapted to test an electrical quality and an optical quality of an optoelectronic structure under test having electrical and optical components.

High input/output density optoelectronic probe card for wafer-level test of electrical and optical interconnect components, methods of fabrication, and methods of use

Devices having one or more of the following: an input/output (I/O) interconnect system, an optical I/O interconnect, an electrical I/O interconnect, a radio frequency I/O interconnect, are disclosed. A representative I/O interconnect system includes a first substrate and a second substrate. The first substrate includes a compliant pillar vertically extending from the first substrate. The compliant pillar is constructed of a first material. The second substrate includes a compliant socket adapted to receive the compliant pillar. The compliant socket is constructed of a second material.

Devices having compliant wafer-level input/output interconnections and packages using pillars and methods of fabrication thereof

An apparatus for low-damage, anisotropic etching of substrates having the substrate mounted upon a mechanical support located within an ac or dc plasma reactor. The mechanical support is independent of the plasma reactor generating apparatus and capable of being electrically biased. The substrate is subjected to a plasma of low-energy electrons and a species reactive with the substrate. An additional structure capable of being electrically biased can be placed within the plasma to control further the extraction or retardation of particles from the plasma.

Method and apparatus for low energy electron enhanced etching of substrates in an AC or DC plasma environment

Devices and systems having one or more of the following components: a compliant pillar with a modified tip surface (non-flat tip) and a corresponding compliant socket; an optical/electrical I/O interconnect and a corresponding compliant socket; a lens/waveguide optical pillar, a polymer bridge, and an L-shaped pillar, are described herein. In addition, methods of making these components and methods of using these components are disclosed herein.

Dual-mode/function optical and electrical interconnects, methods of fabrication thereof, and methods of use thereof

Wafer-level electronic packages having waveguides and methods of fabricating chip-level electronic packages having waveguides are disclosed. A representative chip-level electronic package includes at least one waveguide having a waveguide core. In addition, another representative chip-level electronic package includes a waveguide having an air-gap cladding layer around a portion of the waveguide core. A representative method for fabricating a chip-level electronic package includes: providing a substrate having a passivation layer disposed on the substrate; disposing a waveguide core on a portion of the passivation layer; disposing a first sacrificial layer onto at least one portion of the passivation layer and the waveguide core; disposing an overcoat layer onto the passivation layer and the first sacrificial layer; and removing the first sacrificial layer to define an air-gap cladding layer within the overcoat polymer layer and around a portion of the waveguide core.

Guided-wave optical interconnections embedded within a microelectronic wafer-level batch package

An apparatus for low-damage, anisotropic etching of substrates having the substrate mounted upon a mechanical support located within an ac or dc plasma reactor. The mechanical support is independent of the plasma reactor generating apparatus and capable of being electrically biased. The substrate is subjected to plasma of low-energy electrons and a species reactive with the substrate. An additional structure capable of being electrically biased can be placed within the plasma to control further the extraction or retardation of particles from the plasma.

Devices and method of fabrication thereof are disclosed. A representative device includes one or more lead packages. The lead packages include a substrate including a plurality of die pads, an overcoat polymer layer, a plurality of sacrificial polymer layers disposed between the substrate and the overcoat polymer layer, and a plurality of leads. Each lead is disposed upon the overcoat polymer layer having a first portion disposed upon a die pad. The sacrificial polymer layer can be removed to form one or more air-gaps.

Compliant wafer-level packaging devices and methods of fabrication

Compliant wafer level packages and methods for monolithically fabricating the same. A monolithically fabricated compliant wafer level package having a compliant layer and a compliant interconnect passing therein. The compliant interconnects being provided so that electrical and mechanical connections may be supported across the compliant layer , and constructed so that stresses related to relative motion between electrical components is accommodated. A method of providing a substrate having a compliant layer , the compliant layer having a via that exposes a die pad on the substrate . Fabricating a compliant interconnect so that the compliant interconnect contacts the die pad . The compliant interconnect constructed so that electrical and mechanical connections may be supported through the compliant layer

Monolithically-fabricated compliant wafer-level package with wafer level reliability and functionality testability

A method of low-damage, anisotropic etching of substrates including mounting the substrate upon a mechanical support located within an ac or dc plasma reactor. The mechanical support is independent of the plasma reactor generating apparatus and capable of being electrically biased. The substrate is subjected to a plasma of low-energy electrons and a species reactive with the substrate. An additional structure capable of being electrically biased can be placed within the plasma to control further the extraction or retardation of particles from the plasma.

A method of low-damage, anisotropic etching and cleaning of substrates including mounting the substrate upon a mechanical support located within the positive column of a plasma discharge generated by either an ac or dc plasma reactor. The mechanical support is independent of the plasma reactor generating apparatus and capable of being electrically biased. The substrate is subjected to the positive column, or electrically neutral portion, of a plasma of low-energy electrons and a species reactive with the substrate. An additional structure capable of being electrically biased can be placed within the plasma to control further the extraction or retardation of particles from the plasma.

Method and apparatus for low energy electron enhanced etching and

A method-of low-damage, anisotropic etching of substrates including mounting the substrate upon the anode in a DC plasma reactor and subjecting the substrate to a plasma of low-energy electrons and a species reactive with the substrate. An apparatus for conducting low-damage, anisotropic etching including a DC plasma reactor, a permeable wall hollow cold cathode, an anode, and means for mounting the substrate upon the anode.

Method and apparatus for low energy electron enhanced etching of

The present invention is a system and method for reducing the voltage necessary to produce a glow discharge in a gas. This is done by fabricating the cathode in a gas discharge device out of a conductive material that is permeable to the subject gas rather than out of a solid material, as in the prior art. Fabricating the cathode with a permeable material rather than a solid material increases the surface area of the cathode and provides the gas with greater access to the cathode's surface. Increasing the surface area of the cathode increases the total discharge current which can be extracted from the cathode without increasing the extraction voltage. This allows the gas discharge device to be operated at a lower voltage than is possible using a cathode fabricated of a solid material.

Apparatus and method for reducing operating voltage in gas discharge

A method of low-damage, anisotropic etching of substrates including mounting the substrate upon the anode in a DC plasma reactor and subjecting the substrate to a plasma of low-energy electrons and a species reactive with the substrate. An apparatus for conducting low-damage, anisotropic etching including a DC plasma reactor, a permeable wall hollow cold cathode, an anode, and means for mounting the substrate upon the anode.

Novel processes and apparatus permit lift-off, alignment, and bonding of materials and devices. The processes involve first depositing a device layer on a sacrifical layer situated on a growth substrate. A device may be defined in the device layer. The device layer or the device is coated with a carrier layer. The sacrificial layer and/or the growth substrate are then etched away to release the combination of the device layer and the carrier layer from the growth substrate. The device layer or device can then be aligned and selectively bonded to a host substrate. Other processes and apparatus are set forth for facilitating lift-off, bonding, handling, and patterning of he device layer or device.

Growing community of inventors

Atlanta, GA, United States of America

Kevin P Martin