Commissariat a L'energie Atomique Et Aux Energies Alternatives

Kevin Mambu

Jean-Philippe Noel

Henri-Pierre Charles

Maha Kooli

The present description concerns a system comprising at least one first and one second memory circuits; and a direct data transfer circuit which is adapted to receiving specific instructions originating from an external processor, and to decoding specific instructions comprising: a specific instruction SET_REGION of definition of a sub-region in the first memory circuit towards and from which the data will be transferred; and a specific instruction of transfer between said sub-region and the second memory circuit, the specific transfer instruction comprising a first address field containing the relative coordinates, in said sub-region, of a first reference cell.

Direct data transfer system

The present description concerns a system comprising a processor and an SDMA circuit of direct transfer of a data sequence between a source memory circuit and a destination memory circuit, a sub-region of the source circuit comprising the elements of a data array, the SDMA decoding computing kernel information called BIT_PATTERN of an elementary data pattern to be transferred defined from an elementary array having a predefined size smaller than the size of said data array and intended to identify an elementary array window of said array, each element of the elementary array comprising a bit capable of taking a state '1' or “0” according to whether the element belongs or not to said pattern, the SDMA recovering the data of said array associated with elements of the BIT_PATTERN having their bit at “1”.

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Grenoble, France

Kevin Mambu