Texas Instruments Corporation

Kevin Main

Andrew W Lueck

Charles Michael Campbell

Harry W Hartjes

Muhammad Waqar Afzal

Robert M Nally

Roy David Wojciechowski

Jeffrey H Enoch

Sumit Rupri Das

Sumit Das

A PCI bus time-based weighted round robin arbiter has a phase table divided into a plurality of phases. Each of the phases is assigned to one of the ports on the PCI bus. An arbiter state machine is coupled to the phase table and looks at the port assignment for the next plurality of phases, for example, 3 phases. If the arbiter determines that the next plurality of phases is assigned to a single port, that port is selected as the next bus master.

Time-based weighted round robin arbiter

A PCI Express to PCI bridge enables upstream and downstream isochronous data transfer by modifying the PCI bus arbiter so that the PCI device on the PCI bus is treated as a virtual port for the bridge. Data from the PCI device is assigned via a port arbitration table to sufficient bandwidth so that the data from the PCI device can be transferred upstream isochronously. The bridge also handles downstream isochronous data transfer.

PCI express to PCI translation bridge

A hybrid PCI_Express fabric system allows LPC bus commands and data to be sent across the PCI_Express fabric from a portable computer to its docking station. This permits the portable computer to be coupled to peripheral devices connected to the docking station without additional connectors on the portable computer and the docking station.

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The invention provides systems, devices, and methods for using more than one Accelerated Graphics Port (AGP) to process graphics for a single computer monitor (). In one embodiment, the invention is a method of providing advanced/high-performance AGP capabilities to a laptop computer by intercepting AGP signals from a laptop having a low-power AGP () and converting the AGP signals to signals for a high-performance AGP ().

System, method, and device for accelerated graphics port linking

A system having a PCI Express fabric and PCI devices connected thereto transmits data from the PCI devices having PCI Express traffic classes assigned. A PCI Express to PCI bridge assigns a predetermined address to the grant line for each PCI device coupled to the PCI bus and stores this address along with the data from the PCI device in the PCI transaction queues. When the data is transmitted along the PCI Express fabric, or when it is processed within the PCI Express to PCI bridge, the address assigned to the respective grant line becomes the PCI Express traffic class for that data. This enables the commands from one device to be processed irrespective of commands from other PCI devices on the PCI bus.

Generating multiple traffic classes on a PCI Express fabric from PCI devices

The present invention provides a system for signaling legacy serialized interrupts within a PCI-Express environment, using message signaled interrupts. The system provides structures and methods that interface a PCI environment () with a PCI-Express environment (). The present invention provides a PCI to PCI-Express bridge device () that is communicatively linked () to the PCI and PCI-Express environments. The bridge device comprises a translation function () that is communicatively linked () to the PCI and PCI-Express environments. A serialized interrupt is signaled from the PCI environment, and the translation function generates a message signaled interrupt within the PCI-Express environment based on that serialized interrupt.

System for signaling serialized interrupts using message signaled interrupts

A low pin count (LPC) input/output (I/O) bridge device and method for a portable computer having a plurality of legacy ports and a docking connector. The LPC I/O bridge device includes an LPC controller coupled to the legacy ports and docking connector. The LPC controller is adapted to detect whether the portable computer is coupled to a docking station via the docking connector and route data transmissions to the legacy ports, docking connector, or both, based on information received from an LPC interface. Serialization logic coupled to the LPC controller serializes data transmissions routed to the docking connector.

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Plano, TX, United States of America

Kevin Main