International Business Machines Corporation

Kevin M Prettyman

Benjamin V Fasano

Lawrence Alfred Clevenger

David Clifford Long

Jon Alfred Casey

Rainer Klaus Krause

Gerd Pfeiffer

Brian Christopher Sapp

Harold John Hovel

Carl John Radens

Kevin Shawn Petrarca

John Ulrich Knickerbocker

Zhengwen O Li

Mark J LaPlante

David B Goland

Gregory M Johnson

John Joseph Garant

Keith C O'Neil

Candace A Sullivan

Daniel S Mackin

Cynthia J Calli

Kathleen Mary McGuire

Scott R Dwyer

Darren T Cook

Joseph Christopher Saltarelli

Michael Thomas Puchalski

Donald Rene Wall

Srinivasa S N Reddy

Mukta G Farooq

Timothy Joseph Dalton

Peter Alfred Gruber

John Peter Karidis

Russell Alan Budd

Thomas Weiss

Richard Francis Indyk

Christopher Lee Tessler

Maxime Darnon

Glen Nelson Biggs

Phillip W Palmatier

Bouwe W Leenstra

Srinivasa N Reddy

Ranier Krauser

An apparatus, system, and method are disclosed for a photovoltaic module, the photovoltaic module comprising a plurality of photovoltaic cells, a controllable infrared protection layer, and a protection switching means. The controllable infrared protection layer is for reducing the infrared radiation absorbed by the photovoltaic module, where the controllable infrared protection layer has a first state and a second state. When the infrared protection layer is in the first state the transmission of infrared radiation to the photovoltaic cells is higher than when the infrared protection layer is in the second state. The protection switching means is for switching the controllable infrared protection layer between the first state and the second state.

Photovoltaic module with a controllable infrared protection layer

An apparatus, system, and method are disclosed for restoring efficiency of a photovoltaic cell. An illumination module illuminates photovoltaic cells so the cells receive a time integrated irradiance equivalent to at least 5 hours of solar illumination. After illumination, an annealing module anneals the photovoltaic cells at a temperature above 90 degrees Celsius for a minimum of 10 minutes. In one embodiment, the illumination module illuminates the photovoltaic cells for a time integrated irradiance equivalent to at least 20 hours of solar illumination. In another embodiment, the illumination module illuminates the photovoltaic cells for a time integrated irradiance equivalent to at least 16 hours of solar illumination while being heated to at least 50 degrees Celsius. In another embodiment, a solar concentrator irradiates the photovoltaic cells in sunlight for at least 10 hours and increases the irradiance of solar illumination on the cells by a factor of 2 to 5.

Regeneration method for restoring photovoltaic cell efficiency

A fill head apparatus includes at least one chamber for holding a fluid. The chamber has an outlet for expelling the fluid. A vacuum device has an inlet for a suction device adjacent to the fluid outlet. A plurality of flexible and resilient sealing devices contact a top surface of a workpiece. The sealing devices are positioned on opposing sides of the chamber outlet and on opposing sides of the vacuum device inlet, such that the sealing devices create at least a partial seal around a cavity defined by the workpiece and the cavity is beneath both the chamber outlet and the vacuum outlet.

Fill head interface with combination vacuum pressure chamber

A photovoltaic module () with a plurality of solar cells () interconnected in serial and/or parallel arrangement within the module () is equipped with an overheat protection system () for suppressing damages of the photovoltaic module () due to defects of the solar cells (). The overheat protection system () comprises a heat sensor () which is thermally coupled to a solar cell (). The heat sensor () is physically integrated into an electrical switch () which is electrically connected to said solar cell ().

Solar module with overheat protection

A method for manufacturing a photovoltaic solar cell device includes the following. A p-n junction having a first doping density is formed. Formation of the p-n junction is enhanced by introducing a second doping density to form high doped areas for a dual emitter application. The high doped areas are defined by a masking process integrated with the formation of the p-n junction, resulting in a mask pattern of the high doped areas. A metallization of the high doped areas occurs in accordance with the mask pattern of the high doped areas.

Photovoltaic solar cell device manufacture

The invention relates to a manufacturing process of a photovoltaic solar cell () comprising:

Manufacturing process for making photovoltaic solar cells

A method of manufacturing a photovoltaic cell using a semiconductor wafer having a front side and a rear side, wherein the photovoltaic cell produces electricity when the front side of the semiconductor wafer is illuminated.

Method of manufacturing a photovoltaic cell

Processes for fabricating a contact grid for a photovoltaic cell generally includes providing a photovoltaic cell having an antireflective coating disposed on a sun facing side, the photovoltaic cell comprising a silicon substrate having a p-n junction; soft stamping a pattern of a UV sensitive photoresist and/or polymer onto the antireflective coating; exposing the UV sensitive photoresist and/or polymer to ultraviolet radiation to cure the UV sensitive photoresist and/or polymer; etching the pattern to form openings in the antireflective coating that define the contact grid; stripping the UV sensitive photoresist and/or polymer; and depositing a conductive metal into the openings defined by the pattern. The metal based paste can be aluminum based, which can be annealed at a relatively low temperature.

Methods for manufacturing a contact grid on a photovoltaic cell

The present invention provides a method for producing a temporary chip carrier for semiconductor chip burn-in test and speed sorting. A multi-layered substrate or card, usually comprised of one of various materials is made by offsetting the conductor-filled vias or holes in the outer few layers with the outer most layer not being filled with a conductor, such that a partially filled via or hole is produced. This effectively produces a smaller surface conductor feature, on which the semiconductor chip is temporarily attached, electrically tested, and subsequently removed using various methods, at forces much lower than normal chip removal processes require.

Method to produce low strength temporary solder joints

A multilayer ceramic substrate in which an outer metal pad is anchored to the substrate by a single metal-filled via in the first ceramic layer adjacent to the metal pad. In turn, this single metal-filled via is anchored to the substrate by a larger, single metal-filled via in the next ceramic layer adjacent to the first ceramic layer. Preferably, the metal-filled vias and metal pad are 100 volume percent metal.

Multilayer ceramic substrate with single via anchored pad and method of forming

The present invention discloses a CVD (Chemical Vapor Deposition) process where nickel or alloys thereof, such as, Ni/Cu, Ni/Co, are deposited on metal surfaces which are capable of receiving nickel or alloys thereof, using an Iodide source, preferably an Iodide salt, such as, Ammonium Iodide or Copper Iodide, with at least one inert stand-off in contact with the receiving metal surface. This invention basically allows the CVD of nickel (Ni) on molybdenum (Mo) or tungsten (W) where the nickel source is physically isolated from the refractory metal surface to be plated using at least one inert material that is in floating contact with the refractory metal surface that needs to be coated with at least one layer of nickel or alloy thereof.

CVD of metals capable of receiving nickel or alloys thereof using inert contact

Thermoelectric devices having enhanced thermal characteristics are fabricated using multilayer ceramic (MLC) technology methods. Aluminum nitride faceplates with embedded electrical connections provide the electrical series configuration for alternating dissimilar semiconducting materials. Embedded electrical connections are formed by vias and lines in the faceplate. A portion of the dissimilar materials are then melted within the tunnels to form a bond. Thermal conductivity of the faceplate is enhanced by adding electrically isolated vias to one surface, filled with high thermal conductivity metal paste. A low thermal conductivity material is also introduced between the two high thermal conductivity material faceplates. Alternating semiconducting materials are introduced within the varying thermal conductivity layers by punching vias within greensheets of predetermined thermal conductivity and filling with n-type and p-type paste or may also be patterned in linear or radial fanout patterns through screening techniques and lamination of wire structures. a liquid channel within the faceplate is used to enhance thermal energy transfer. Thermoelectric devices are physically incorporated within the IC package using MLC technology.

Thermoelectric devices and methods for making the same

A compliant, high-density land grid array connector and the process of making such a connector. The process includes the steps of: (a) forming holes in a supporting substrate; (b) forming threaded sidewalls by tapping the holes; (c) plating the threaded sidewalls to form bellows-like structures; and (d) etching a surface of the supporting substrate after the plating to leave portions of the bellows-like structures protruding past a surface of the substrate. The resulting connector includes a substrate having bellows-like contacts extending from one or both sides for resiliently engaging pads such as those of an LGA module. As an alternative, the holes may be formed as blind holes. Ends of the bellows-like contacts may be roughened. The connector may also be formed by casting the substrate in a mold box having screw-like mandrels followed by steps of mandrel removal, hole plating and surface etching.

Compliant high-density land grid array (LGA) connector and method of manufacture

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Poughkeepsie, NY, United States of America

Kevin M Prettyman