Intel Corporation

Kevin M Lenio

Behrooz Z Mehr

Juan P Soto

Larry E Mosley

Nicholas Holmberg

Milan Keser

Nick Holmberg

A parallel-plate capacitor structure includes a capacitor electrode including a first resistance and an electrode tab appended to the capacitor electrode and including a second resistance. The second equivalent series resistance is greater than the first equivalent series resistance. A process of assembling a parallel-plate capacitor package is also disclosed. A computing system is also disclosed that includes the parallel-plate capacitor package.

Controlled-resistance capacitors, and methods of assembling same

Apparatus and systems, as well as fabrication methods therefor, may include a component having a plurality of contacts substantially equally spaced apart from each other by a first distance along a first line coupled to an angled parallel conductor group having a plurality of conductors substantially equally spaced apart from each other by a second distance less than the first distance along a second line.

Connection apparatus, systems, and methods

A method and apparatus is provided that pertains to a low inductance capacitor. The capacitor has a first surface electrically interconnected to a plurality of conductive electrodes and one or more second surfaces electrically interconnected to a plurality of electrodes interposed between the electrodes electrically interconnected to the first conductive surface. A dielectric layer separates the layered plurality of electrodes. The one or more second conductive surfaces are positioned within the body of the layered electrodes, such that the distance between the terminations of the first conductive surface and the one or more second conductive surfaces is shortened to lower inductance.

Growing community of inventors

Chandler, AZ, United States of America

Kevin M Lenio