Nxp Usa, Inc.

Other

Nxp B.v.

Kevin Kim

Vikas Shilimkar

Joseph Gerard Schultz

Humayun Kabir

Jeffrey Kevin Jones

Ibrahim Khalil

Olivier Lembeye

Enver Krvavac

Cedric Cassan

Charles John Lessard

Daniel Joseph Lamey

Lakshminarayan Viswanathan

Bruce McRae Green

Richard Emil Sweeney

Freek Egbert Van Straten

Hernan A Rueda

Igor Blednov

Pascal Peyrot

Eric Johnson

Power amplifier systems including field trapper structures are disclosed. In embodiments, the power amplifier system includes a printed circuit board (PCB), a power amplifier module (PAM), and a field trapper structure. The PAM includes, in turn, a topside radio frequency (RF) input terminal, topside RF output terminal, a PAM topside surface on which the topside RF input terminal and the topside RF output terminal are located. The PAM is mounted to the PCB in an inverted orientation such that the PAM topside surface is positioned adjacent and faces a module mount region provided on a frontside of the PCB. The field trapper structure includes a first field trapper patch, which extends parallel to the PCB frontside, is composed of an electrically-conductive material, and is located within or adjacent the module mount region in the thickness direction.

Power amplifier modules, systems, and substrates containing field trapper structures

A power amplifier device includes a substrate, a power transistor die, and one or more surface mount components. The substrate has substrate die contacts exposed at a first substrate surface, and additional substrate contacts exposed at a second substrate surface. The power transistor die includes an integrated transistor. The transistor includes a control terminal and a first current conducting terminal coupled, respectively, to first and second die contacts at the first die surface, and a second current conducting terminal coupled to a third die contact at a second die surface. The surface-mount components are connected to the additional substrate components, and the surface-mount components are electrically coupled through the substrate to the first and second die contacts. The power amplifier device also includes an encapsulation material layer covering the surface-mount components and the second substrate surface.

Packaged power amplifier device

A power amplifier device includes a substrate formed from a stack of alternating dielectric and patterned conductive layers and conductive vias electrically connecting the patterned conductive layers. The substrate has a set of substrate die contacts exposed at a first substrate surface, and an air cavity extending into the substrate through a portion of the first substrate surface that is located between the set of substrate die contacts. A power transistor die has first and second die contacts at a first die surface, which are connected to the substrate die contacts. The power transistor die also includes an integrated transistor in an active area of the die. The integrated transistor includes a control terminal coupled to the first die contact, and a first current conducting terminal coupled to the second die contact. The active area is aligned with the first air cavity.

Packaged power amplifier device with air cavity over die

A transistor includes a semiconductor substrate having a first terminal and a second terminal. An interconnect structure is formed on an upper surface of the semiconductor substrate, the interconnect structure being formed of multiple layers of dielectric material and electrically conductive material. The electrically conductive material of the interconnect structure includes a pillar in electrical contact with the first terminal, a first runner electrically connected to the pillar, a tap interconnect in electrical contact with the second terminal, a second runner electrically connected to the tap interconnect, a shield structure positioned between the pillar and the tap interconnect, and a shield runner electrically connected to the shield structure, the shield runner overlying the second runner in a direction perpendicular to the upper surface of the semiconductor substrate.

Compact transistor utilizing shield structure arrangement

A device includes a semiconductor substrate, a source metallization over an active area of the semiconductor substrate, a through-substrate via electrically connected to the source metallization, and an input bond pad formed in the semiconductor substrate and spaced apart from the active area. The input bond pad is electrically connected to a set of gate structures. The device includes a first inductive coil over the semiconductor substrate between a first portion of the source metallization and a second portion of the source metallization and a first capacitor over the semiconductor substrate between the first portion of the source metallization and the second portion of the source metallization. The first inductive coil and the first capacitor are connected in series between the input bond pad and the through-substrate via.

Transistor with integrated passive components

A sound muffling chamber covers a nose and mouth in an airtight manner. The sound muffling chamber includes a microphone that detects vocal sound waves in the sound muffling chamber and generates a voice signal. A digital signal processing system analyzes the voice signal and generates a voice cancellation signal. A sound silencing chamber includes a speaker that generates out of phase sound waves in response to the voice cancellation signal that superimposes on and cancels the vocal sound waves. A sound decelerator is positioned between the sound muffling chamber and the sound silencing chamber and configured to increase a traveling time of the vocal sound waves such that the vocal sound waves' arrival at the sound silencing chamber may be synchronized with the arrival of a voice cancellation signal. The sound muffling chamber may include inflatable cells separated by slats such that the sound muffling chamber is foldable.

System and method for a speaking chamber with voice cancellation

An amplifier module includes a module substrate with a mounting surface, a signal conducting layer, a ground layer, and a ground terminal pad at the mounting surface. A thermal dissipation structure extends through the module substrate. A ground contact of a power transistor die is coupled to a surface of the thermal dissipation structure. Encapsulant material covers the mounting surface of the module substrate and the power transistor die, and a surface of the encapsulant material defines a contact surface of the amplifier module. A ground terminal is embedded within the encapsulant material. The ground terminal has a proximal end coupled to the ground terminal pad, and a distal end exposed at the contact surface. The ground terminal is electrically coupled to the ground contact of the power transistor die through the ground terminal pad, the ground layer of the module substrate, and the thermal dissipation structure.

Amplifier modules and systems with ground terminals adjacent to power amplifier die

An endotracheal or tracheostomy tube with a cuff assembly includes a cuff pressure regulator and a leak detection system. Pressure sensors monitor and measure a tracheal wall pressure and pressures in the cuff assembly. An abnormal reading from the pressure sensors may initiate a cuff-pressure adjusting process. The leak detection system detects an air leak in the seal between the cuff assembly and the tracheal wall. A scented film with a predetermined scent is positioned on an inferior portion of the cuff assembly, distally from the seal with the tracheal wall. An air leak is indicated when the predetermined scent is detected in air in the trachea proximal to the cuff assembly. An air-circulation device generates air flow into the trachea such that a new batch of air may be sampled and tested. The detection of an air leak may initiate a cuff-pressure adjusting process.

System and method for pressure management and air leak detection of an inflatable cuff in a medical device

A transistor includes a source contact connected to a Through-Silicon Via (TSV). A drain contact is connected to a first pad. A gate structure is interposed between the source contact and the drain contact. A second pad is connected to the gate structure, the second pad comprising a first side diametrically opposed to a second side, and a third side interposed therebetween, the source contact proximal to the third side, a first portion of the first side and a second portion of the second side.

Transistor with center fed gate

A cuff assembly for a tracheostomy tube includes an outer bladder and an inner cuff. The inner cuff is positioned adjacent to the tracheostomy tube, and the outer bladder is positioned adjacent to the inner cuff. The outer bladder is made with a less elastic material and operates at a higher relative pressure. The inner cuff is made with a more elastic or hyper-elastic material and operates at a lower relative pressure. A secondary airflow opening is formed on a lateral wall of the tracheostomy tube between the cuff assembly and a main distal opening of the tracheostomy tube.

System and method for a tracheostomy tube with a secondary airflow opening and a dual cuff assembly

A cuff assembly for an airway tube includes an outer bladder and an inner cuff. The inner cuff is positioned adjacent to the airway tube, and the outer bladder is positioned adjacent to the inner cuff. The outer bladder is made with a less elastic material and operates at a higher relative pressure. The inner cuff is made with a more elastic or hyper-elastic material and operates at a lower relative pressure. A pressure controller independently adjusts the pressure within the inner cuff and the outer bladder. A secretion collection receptacle is formed by the cuff assembly and is evacuated via a suction catheter or channel.

System and method for an endotracheal tube cuff assembly

Integrated circuits, such as power amplifier integrated circuits, are disclosed containing compact-footprint, vertically-integrated capacitor-avalanche diode (AD) structures. In embodiments, the integrated circuit includes a semiconductor substrate, a metal layer system, and a vertically-integrated capacitor-AD structure. The metal layer system includes, in turn, a body of dielectric material in which a plurality of patterned metal layers are located. The vertically-integrated capacitor-AD structure includes a first AD formed, at least in part, by patterned portions of the first patterned metal layer. A first metal-insulator-metal (MIM) capacitor is also formed in the metal layer system and at least partially overlaps with the first AD, as taken along a vertical axis orthogonal to the principal surface of the semiconductor substrate. In certain instances, at least a majority, if not the entirety of the first AD vertically overlaps with the first MIM capacitor, by surface area, as taken along the vertical axis.

Integrated circuits containing vertically-integrated capacitor-avalanche diode structures

Various embodiments relate to an integrated circuit including a transistor device having input and output terminals, and an inductor-capacitor (LC) circuit coupled to one of the terminals of the transistor device. The LC circuit includes a capacitor having a top plate and a bottom plate, a inductor having a coil structure, and a connector configured to couple the inductor and an interior portion the top plate of the capacitor. The inductor at least partially overlaps the capacitor.

Compact RFIC with stacked inductor and capacitor

Various embodiments relate to a packaged radio frequency (RF) amplifier device implementing a split bondwire where the direct ground connection of an output capacitor is replaced with a set of bondwires connecting to ground in a direction opposite to the wires connecting to the output of a transistor to an output pad. This is done in order to reduce the effects of mutual inductance between the various bondwires associated with the output of the RF amplifier device.

RF amplifiers with series-coupled output bondwire arrays and shunt capacitor bondwire array

A semiconductor device includes an active region formed in a substrate. The active region includes input fingers, output fingers, and common fingers disposed within the substrate and oriented substantially parallel to one another. An input port is electrically connected to the input fingers and an output port is electrically connected to the output fingers. A common region is electrically connected to the common fingers. At least one of the input and output ports is positioned within the active region between the input, output, and common fingers. The common region is interposed between a pair of the common fingers such that the common fingers of the pair are spaced apart by a gap, and at least one of the input and output ports is position in the gap.

Growing community of inventors

Gilbert, AZ, United States of America

Kevin Kim