Maxim Integrated Products, Inc.

Gazelle Semiconductor, Inc.

Kevin Kennedy Johnstone

Yusuf Haque

David Christian Gerard Tournatory

Benjamin J McCarroll

Mark Albert Pinchback

The present disclosure includes switching regulator circuits and methods. In one embodiment, a first switching regulator stage receives a first input voltage and produces a first voltage on a first node. A second switching regulator stage receives the first input voltage and produces a second voltage on a second node. A capacitor includes a first terminal coupled to the first node and a second terminal coupled to the second node, and the first switching regulator stage and the second switching regulator stage are configured to set a first voltage on the first node and to set a second voltage on the second node.

Switching regulator circuits and methods

Embodiments of the disclosure include high slew rate switching regulator circuits and methods. In one embodiment, switching regulators are coupled to an output node. A first switching regulator may drive the output node. A second switching regulator may drive the output node through a capacitor. Control circuitry may include feedback inputs to maintain a first voltage on the output of the first switching regulator on one terminal of the capacitor and further to maintain a second voltage on the output of the second switching regulator on the other terminal of the capacitor.

High slew rate switching regulator circuits and methods

The present invention is related to digital to analog converter (DAC) input data encryption off-chip and decryption on-chip to suppress input data in-band harmonic leakage through package related parasitic capacitance. More specifically, the present invention relates to the method and apparatus of input data encryption off-chip by forming the logical exclusive-OR of the raw data and a random single bit data stream. The encrypted data is then read onto the DAC chip where the data is decrypted using identical circuitry and an identical random single bit data stream. The off-chip encryption isolates harmonic content within the input data, preventing leakage of input data harmonic content through IC package-related parasitic capacitance into DAC outputs. Any leakage appears as an increase in spectral noise rather than output distortion and as such, has a much smaller impact on DAC narrow band linearity.

Data encryption for suppression of data-related in-band harmonics in digital to analog converters

An integrated circuit may include matched cells each having an active transconductor, wherein the matched cells are coupled together through respective active transconductor circuits to average the effect of comparator input-referred offsets. Each cell of the matched cells may have a first differential gain stage coupled to a second differential gain stage that is coupled to an output buffer stage, and an associated active transconductor circuit. The active transconductor of each cell is coupled to the gain stage of other cells to average the effect of cell mismatches.

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Mountain View, CA, United States of America

Kevin Kennedy Johnstone