3Com Corporation

3Com Technologies

Hewlett-Packard Development Company, L.p.

Analog Devices,inc.

Kevin Jennings

Edele O'Malley

John F Hickey

Kam Choi

Tadhg Creedon

Vincent Gavin

Jerome Nolan

Sorcha O'Callaghan

Kevin J Hyland

Eugene O'Neill

Gareth Edward Allwright

Christopher Hay

Neil O Fanning

Denise De Paor

Joseph N Butler

Michael Joseph Gleeson

Mike Lardner

Suzanne M Hughes

Raymond Beechinor

Derek Coburn

Brendan Walsh

Sean Boylan

Kevin Loughran

John O'Dowd

Patrick Gibson

David Nolan

Paul O'Keeffe

Ray Beechinor

Eugene O'Neil

A network switch includes a look-up engine for obtaining associated data in response to a header portion of a packet and an interlinked network processor such as a RISC for performing a processing function on the header portion or the associated data. Both look-up engine and the network processor may modify a destination port bitmask. The network processor may implement additional packet header processing required for replication or server load balancing.

Network switch with mutually coupled look-up engine and network processor

Automatic range shifting for an analog to digital converter (ADC) includes combining an external analog input and a DAC output to provide an input to the ADC, detecting whether the range of the output of the ADC is above a predetermined upper range limit or below a predetermined lower range limit, and generating an adjustment code to increase the DAC output if the ADC output is above the upper range limit and to decrease the DAC output if the ADC output is below the lower range limit for decreasing the ADC input when the ADC output is above the upper limit and to increase the ADC input when the ADC output is below the lower limit to keep the ADC input within the ADC range.

Automatic range shift system and method for an analog to digital converter

A network switch which allows a network processor to process resultant data from a look-up engine while the look-up engine proceeds to deal with a subsequent packet. The look-up engine stores the resultant data in registers from which the resultant data is written back for the packet if the processor does not intervene. If the processor intervenes it acts on the resultant data, which is written back for the packet only after the processor has finished. A system of pointers and busy bits ensures that the packet is not forwarded until the look-up engine and (if required) the network processor have completed their operations in relation to the packet.

Network switch with parallel working of look-up engine and network processor

A program tool automatically generating interconnect logic for a system-on-a-chip is based on a library of operational cores and on a architecture which requires all data exchange between cores to proceed via shared memory, which may be 'off-chip'. The architecture includes a data aggregation technique for access to memory with successive levels of arbitration.

Automatic generation of interconnect logic components

A network router has a distributed processing scheme for multicast packets. The router has a look-up and forwarding engine operative in response to the reception of an internet protocol multicast packet to direct the packet to a multiplicity of transmit ports which may or may not be connected to the source network segment from which the multicast packet was received by the router. Each transmit port is associated with a predetermined default network segment and the engine directs the packet to the ports (e.g. across the router's backplane) with an identification of the source network segment and control flags which enable processing means associated with the ports to determine by comparison of the respective network segment and the source network segment whether the packet is bridged from the respective port or routed, with relevant modification of the packet, from that port. The control flags comprises a first flag which can be set to allow the relevant modification and a second flag which can be set to allow the comparison between the source segment and the predetermined default segment.

Distributed multicast routing in packet-based communication network devices

A communication device which includes a hardware trie search facility. At least part of a memory is divided into memory blocks, each of said blocks consisting of a multiplicity of locations, at least some of said locations each providing when accessed a pointer to another block and an indication of the size of the block. A shift register holds an address key, and a trie block is accessed using an address composed of a number of bits related to said indication of the size of the block. The key is shifted by said number of bits prior to a subsequent stage of the search. Part of the memory comprises an associated data table which includes entries of data enabling a packet to be forwarded and at least some locations in said blocks provide when accessed a pointer to an entry in the associated data table.

Communication device with forwarding database having a trie search facility

Trunking or other relationship is defined between ports on different devices in a cascade-connected stack of network devices. When network communications are passed via the cascade connection an indication is included of whether it originated from a port that is part of a trunk and thereby port-mismatch errors can be avoided.

Trunking in stacked communication devices

Controlling the allocation of priority for data packets within a multi-port switch includes detecting the commencement of an HTTP message; enabling the storage of an identification of the source port on which that message was received by the switch; finding correspondence between destination data of packets and the said source port; and adjusting a priority allotted to said packets in response to the correspondence. The adjustment of priority preferably increases the priority of packets forwarded to said the port relative to priority allotted packets received at the source port and thereby allots asymmetric priority to traffic between a server and a client.

Allocation of asymmetric priority to traffic flow in network switches

An architecture for a system on a chip wherein functional cores have wrappers for compatibility with a common bus system and the bus system includes aggregators for bus transactions of different speeds and/or bus widths.

Asic system architecture including data aggregation technique

The present invention is based on a ring architecture wherein each chip in the multiplicity of chips is connected in a chain so that it can receive packets from the next previous chip in the chain and forward packets to the next following chip in the chain, whereby to form a ring. Before a packet is placed on the ring by a device it is provided with a 'masking' field which identifies each of the other devices and the ports within any such device to which the packet must be sent in order to achieve a multicast. When a device in its turn receives such a packet it will examine the masking field to determine whether the field identifies that device. If so, the packet, which may be held in temporary storage, may be processed for forwarding from a port of that device. The device will strip from the masking field the identification of the respective device and transmit the packet with a thus modified masking field to the next device in turn. If a packet does not contain any indication of another device in the ring, the packet will not be transmitted and therefore will naturally terminate.

Packet multicasting in a ring architecture

A system including an ordered data table containing linked lists of MAC addresses has a multiplicity of search engines which have their access to an LRU engine under the control of a token which is passed from one search engine to the next when the LRU engine has completed reordering the table after an address look-up. The system avoids conflicts between searching and reordering and allows reordering to be performed at a controlled rate.

System for controlling look-ups in a data table in a network switch

A forwarding database in a network switch is established and maintained by performing a look-up for a source address read from an incoming frame to find a match between the source address in the frame and the source address in an entry which includes that source address, a port number and an age field. New entries are made if matches are not found, so that the forwarding database facilitates the dispatch of frames to destination addresses corresponding to source addresses in the table. The switch maintains a system age, such as a two-bit field, which is changed from time to time and the current system age is entered in the table as the age field when a source address entry is made. When said source address is found by a look-up process, it is updated with the current system age only if the age field of the entry and the current system age do not correspond. There is a saving of bandwidth arising from the avoidance of write cycles when an age field of an entry corresponds to the current system age.

Restriction of source address up-dating in network switches

A network switch includes a transmit queue of packets along with indication (e.g. in respective status words) of the type of each packet and its size. An arbitrator includes a counter which is incremented by the size (e.g. in bytes) of each packet of a first type (e.g. 'low-loss') and decremented by a scaled size of each packet of a second type (e.g. 'normal loss'). If the queue exceeds a set limit, preferably less than the maximum possible size of the queue, packets are discarded if a scaled packet of the second type exceeds the net content of the counter.

Method and apparatus for controlling traffic queues in network switches

Trunking or other relationship is defined between ports on different devices in a cascade connected stack of network devices. When network communications are passed via the cascade connection an indication is included of whether it originated from a port which is part of a trunk and thereby port-mismatch errors can be avoided.

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Dublin, Ireland

Kevin Jennings