Intel Corporation

Kevin J Smith

Hugh R Kenner

Alice Kwong

K Sridharan

William A Savage

A C-language program performance tuning advisor that helps a systems analyst to improve the performance of an application. The tuning advisor identifies critical regions (hot spots) of an application, and helps the user to analyze the region. Once the region has been identified and analyzed, the tuning advisor advises the user on how to rewrite the original C code to improve the performance of the overall application. When the compiler needs to be conservative to be semantically correct, the tuning advisor suggests code modifications to remove the semantic constraints. The tuning advisor recognizes most commonly used C code patterns which if modified could improve the performance.

Software profiler which has the ability to display performance data on a computer screen

An improved optimizer, in conjunction with a set of initial instruction ordinal assignment policies, a set of instruction ordinal adjustment policies and a set of instruction ordinal to instruction operation size mapping policies, is provided to the code generator of a compiler of the target machine. In addition to logic for performing standard optimizations, the improved optimizer further comprises logic for assigning initial instruction ordinals to instructions in the code being generated for the program being compiled in accordance to the assignment policies, iteratively adjusting the assigned instruction ordinals in accordance to the adjustment policies until they converge into a set of compatible and optimized instruction ordinals, and mapping the final instruction ordinals to instruction operation sizes, inserting additional code where necessary, in accordance to the mapping policies.

Instruction operation size optimization

An improved register allocator, an improved instruction scheduler, an instruction combiner, and an improved loop unroller is provided to the code generator of a compiler of a computer system. Both the improved instruction scheduler and the improved loop unroller support a 'preliminary' and a 'final' mode of operation. Upon invocation, the improved register allocator determines and prioritizes regions of the program being compiled. Next, the improved register allocator, in cooperation with the improved instruction scheduler, the instruction combiner, and the improved loop unroller, determines the optimal partitioning for global and local registers for each region. Then, the improved register allocator allocates registers to each region based on the determined number of global registers for the region. After allocating registers for each region, the improved register allocator merges the regions together. The improved loop unroller and the improved instruction scheduler are then invoked successively in 'final' mode to unroll the various loops and schedule the instructions being generated.

Integrated register allocation, instruction scheduling, instruction

An improved register allocator is provided to the code generator of a compiler. The improved register allocator allocates registers using an improved register candidate usage matrix. The improved register candidate usage matrix comprises row entries, one for each register candidate. Each row entry comprises usage bits indicating at least whether its register candidate is live at the entries, in the bodies, and at the exits of the various basic blocks. The improved register allocator allocates registers by block, deriving interference information from the improved usage matrix. It then merges the register allocation introducing spill code at points where register candidates are split. As a result, a register can be allocated to two register candidates that are live in the same basic block as long as they are not both live at some point in the basic block, and at the same time, a register candidate can be spilled in one basic block and allocated a register in another basic block.

Growing community of inventors

Boulder Creek, CA, United States of America

Kevin J Smith