Freescale Semiconductor,inc.

Motorola Corporation

Apple Inc.

Nxp Usa, Inc.

Kevin B Traylor

Khurram Waheed

Raja Venkatesh Tamma

Steven M Bosze

Jianqiang Zeng

James Wesley McCoy

Leo G Dehner

William C Moyer

Daniel B Schwartz

David S Peckham

Christopher John Becker

Richard B Meador

Gregory Redmond Black

Alan Lee Westwick

Charles R Ruelke

Jayakrishnan Cheriyath Mundarath

Paul Kelleher

Enrique Ferrer

Mihai-Ionut Stanciu

George Norris

Kenneth A Hansen

John Richard Oakley

Rajesh H Zele

Glen James Zoerner

Jing Fang

Keith A Tilley

Thomas J Zuiss

Kuhurram Waheed

Andrew J Webster

Conor Okeeffe

Raja V Tamma

Circuits and methods concerning signal detection are disclosed. In some example embodiments, an apparatus is configured to detect presence of a spreading sequence in a sample data sequence. Phase differences between samples in a sample sequence are determined. Presence of a spreading sequence in the sample sequence is detected by evaluating correlation of reference sub-sequences, of a reference spreading sequence, to the phase differences between samples in a sample sequence. Each of the reference sub-sequences includes fewer chips than the spreading sequence to be detected.

Clear channel assessment

Method embodiments are provided herein for dynamically calibrating and adjusting a direct conversion receiver system. One embodiment includes applying one or more gain control signals to one or more gain elements of a receiver system, where the applying one or more gain control signals results in a gain change to the receiver system; in response to the gain change, determining whether the receiver system exhibits a DC (direct conversion) offset; and in response to a determination that the receiver system exhibits the DC offset, applying one or more DC offset correction control signals to one or more gain elements of the receiver system, where the one or more DC offset correction signals are configured to correct the DC offset.

Systems and methods to dynamically calibrate and adjust gains in a direct conversion receiver

An integrated circuit comprises a dual port modulator and a voltage controlled oscillator (VCO). The dual port modulator has a first input for receiving a transmitter modulation signal, a first output for providing a fractional portion of a high port modulation signal, a second output for providing a integer portion of the high port modulation signal, and a third output for providing a low port modulation signal. The VCO is coupled to the dual port modulator and has a first input for receiving the fractional portion of the high port modulation signal, a second input for receiving the integer portion of the high port modulation signal, a third input for receiving a tuning signal based on the low port modulation signal, and a first output for outputting an RF signal. The dual port modulator provides a signed single bit signal for generating the fractional portion of the high port modulation signal.

Phase locked loop having fractional VCO modulation

A technique for frame synchronization in a communication system includes performing symbol correlation on received signal samples. A determination is made as to whether a magnitude of the symbol correlation is greater than a first threshold. In response to the magnitude of the symbol correlation being greater than the first threshold, an indication is provided that the received symbol is a valid symbol (e.g., a SYNCP symbol or SYNCM symbol). In response to the magnitude of the symbol correlation being less than the first threshold, an indication is provided that the received symbol is an indeterminate symbol (e.g., an invalid symbol or a SYNCM/2 symbol).

Techniques for time-domain frame synchronization of packets

A receiver system includes a DC (direct current) offset estimation block configured to capture a plurality of sample pairs, each sample pair including a first sample of a first signal and a second sample of a second signal. The first and second signals are passed through one or more gain elements. The DC offset estimation block is also configured to apply a modified circle-fit algorithm to the plurality of sample pairs to estimate a first DC offset exhibited by the first signal and a second DC offset exhibited by the second signal, the first and second DC offsets generated by the gain elements, the modified circle-fit algorithm includes a magnitude approximation term used to iteratively estimate the first and second DC offsets. The receiver system also includes a DC offset correction block configured to calculate one or more correction control signals based on the first and second DC offsets.

DC offset tracking of wireless receivers

A technique for detecting symbols includes performing an over-sized discrete Fourier transform (DFT) operation on a received signal that includes at least two repeated symbols. A sum of signal characteristics for subcarriers of one or more possible symbols are determined based on the DFT operation. A sum of signal characteristics for non-subcarriers of the one or more possible symbols is determined based on the DFT operation. Finally, a determination is made as to whether one or more of the one or more possible symbols is detected based on the sum of signal characteristics for the subcarriers and sum of signal characteristics for the non-subcarriers.

Detecting repeated preamble symbols using over-sized discrete fourier transforms

Methods and systems are disclosed for frequency-domain symbol and frame synchronization for multi-carrier communication systems. Received signals are sampled and converted into frequency components associated with subcarriers within the multi-carrier communication signals. Symbol synchronization is performed in the frequency domain by performing correlation(s) between frequency components of the received signal and frequency-domain synchronization symbol(s). After symbol synchronization, frame synchronization correlation is also performed in the frequency domain between frequency components of the received signal and frequency-domain synchronization symbol(s). The disclosed embodiments are particularly useful for symbol and frame synchronization in multi-carrier received signals for power line communication (PLC) systems and/or other harsh noisy communication environments.

Frequency-domain symbol and frame synchronization in multi-carrier systems

Methods and systems are disclosed for frequency-domain frame synchronization for multi-carrier communication systems. Received signals are sampled and converted into frequency domain components associated with subcarriers within the multi-carrier communication signals. A sliding-window correlation (e.g., two-dimensional sliding window) is applied to the received symbols represented in the frequency domain to detect frame boundaries for multi-carrier signals. The sliding-window frame synchronization can be applied by itself or can be applied in combination with one or more additional frame synchronization stages. The disclosed embodiments are particularly useful for frame synchronization of multi-carrier signals in PLC (power line communication) systems.

Frequency-domain frame synchronization in multi-carrier systems

Methods and systems are disclosed for frequency-domain amplitude normalization for symbol correlation in multi-carrier communication systems. Digital samples associated with input signals received from a communication medium are processed using a Fast Fourier Transform (FFT) to generate complex frequency components. Each complex frequency component is normalized with respect to its amplitude, and the frequency-domain, amplitude-normalized frequency components are multiplied with frequency components for reference symbol(s) to generate frequency-domain correlation values. These frequency-domain correlation values are analyzed to determine if a correlation exists between the amplitude-normalized frequency components and the predetermined reference frequency components. A correlation detection output is then generated that indicates whether or not a symbol synchronization was achieved. The disclosed embodiments are particularly useful for symbol correlation in received signals for power line communication (PLC) systems.

Frequency-domain amplitude normalization for symbol correlation in multi-carrier systems

A transmitter and method for processing a digitally modulated communication signal, which may reduce peak-to-average-power-ratio (PAPR) while maintaining acceptable error rates is disclosed. After subcarrier mapping, a first digital representation of the signal is upsampled into a second digital representation, which is transformed into a first time domain representation. Samples whose magnitudes exceed a magnitude limit are limited to that limit to produce a second time domain representation. The second time domain representation is transformed to a third frequency domain representation, which is downsampled into a fourth frequency domain representation. In addition to the in-band subcarriers, some out-of-band subcarriers adjacent to the frequency band are preserved while the remaining out-of-band subcarriers are eliminated to produce a fifth frequency domain representation. The fifth frequency domain representation is then transformed to a third time domain representation, which is converted to an analog signal to be transmitted.

Transmitter and method for reducing the peak-to-average power ratio of a digitally modulated communication signal

A method and system for wireless communications between base and mobile stations use reference signals transmitted from base stations prior transmission of data signals. The reference signals are used to determine propagation characteristics of communication channels between the base and mobile stations and optimize, in real time, parameters of receivers of the mobile stations for processing the following data signals. Applications of the invention include wireless communication systems compliant with OFDMA, 3GPP LTE, RFN-OFDMA, OFDM, TDMA, and the like communication protocols.

Method and system for wireless communications between base and mobile stations

A wireless communication unit has two or more communication modes including one or more mobile phone mode, in which mobile phone mode the wireless communication unit is able to transmit or receive wireless signals via an antenna from and/or to a mobile phone network in accordance with a communication protocol. The unit includes a baseband module and a radiofrequency module. A radiofrequency interface of the baseband module is connected to the radiofrequency module, for receiving and/or transmitting baseband signals from and/or to the radiofrequency module. The radiofrequency module includes a baseband interface, for receiving and/or transmitting the baseband signals to the baseband module and an antenna interface (AI) connectable to an antenna for receiving and/or transmitting radiofrequency signals from and/or to the antenna. A clock system is connected to the radiofrequency interface and the baseband interface. The clock system can provide a clock signal with a clock rate of to the radiofrequency interface and the baseband interface in one or more of the one or more mobile phone modes.

Wireless communication unit, baseband module, radio frequency module, wireless terminal and computer program product

Systems and techniques are described for applying a polar bias modulation having a phase component and an amplitude component to a signal amplified by a power amplifier. The power amplifier (PA) has a plurality of amplifier gain stages and is configured to amplify an input to create an amplifier output signal. The input to the power amplitude is phase modulated based upon the phase component of the polar bias modulation, but need not be amplitude modulated. Amplitude modulation is provided by logic that includes a detector configured to receive an indication of the amplifier output as a feedback signal, a control module configured to generate a control signal based upon both the feedback signal and the amplitude component of the polar bias modulation, and a bias circuit configured to adjust a bias signal associated with at least one of the plurality of amplifier gain stages in response to the control signal. Such a modulation scheme may be readily applied in enhanced data rate for global service mode (GSM) evolution (EDGE) applications, as well as in other environments that make use of polar modulation.

System and method for polar modulation using power amplifier bias control

A technique for performing a discrete Fourier transform (DFT) includes storing, in a single-port memory, multiple signal points. A first group of consecutive ones of the multiple signal points are fetched (from a first line of the single-port memory) to a first input register associated with a processor that includes multiple arithmetic units (AUs) that are each configured to perform multiply accumulate (MAC) operations. A second group of consecutive ones of the multiple signal points are then fetched (from a second line of the single-port memory) to a second input register associated with the processor. Selected pairs of the multiple signal points are then loaded (one from each of the first and second input registers for each pair) into the multiple arithmetic units during an initial butterfly stage. Radix-2 butterfly operations are then performed on the selected pairs of the multiple signal points (using the multiple AUs) to provide respective output elements.

Growing community of inventors

Austin, TX, United States of America

Kevin B Traylor