Amp LLC

Alcatel

The Whitaker Corporation

Kevin A Jaeger

Gerald L Somer

Mudhafar Hassan-Ali

Patrick K Walp

Mark W Cole

The present invention relates to an apparatus and a method for bridging of Ethernet frames between a subscriber LAN and the ATM network. In accordance with the invention a novel (time window discovery) method is used, with coordination of the network administrator and an access management system to provision a network bridging element or bridge with a set of provisioned devices authorized to forward data packets across the bridge. The bridge is allowed within a time window to learn machine-specific MAC addresses for the provisioned table. After the window is expired, or terminated by access management system, the bridge is switched back to learning mode to learn additional MAC addresses for a learned table in the traditional manner. The devices learned during the learning phase are not authorized to forward data packets across the bridge.

Bridging network device with time windowed discovery of machine addresses

A digital data transmission system includes a transmitter connected to a receiver by a twisted pair. A digital transversal filter, included in the transmitter, supplies output signals to a resistor bank. The output signals are weighted by the resistors of the resistor bank, summed, and used to generate the transmitted pulse. The values of the resistors are chosen to predistort the transmitted pulse so that, after distortion by the transmission medium, the transmitted pulse more nearly corresponds to the ideal pulse shape for which the receiver is designed.

Digital data transmission system with predistortion of transmitted pulses

A digital data transmission system includes a transmitter connected to a receiver by a twisted pair. A digital transversal filter, included in the transmitter, supplies output signals to one of four resistor banks, as determined by an automatic selection system that selects one of the resistor banks based on the measured transmission characteristics of the twisted pair. The output signals are weighted by the resistors of the selected resistor bank, summed, and used to generate the transmitted pulse. The values of the resistors of each resistor bank are chosen to shape the transmitted pulse for a respective length of transmission medium so that, after distortion by the transmission medium, the transmitted pulse more nearly corresponds to the ideal pulse shape for which the receiver is designed.

Digital data transmission system with adaptive predistortion of

A digital transversal filter includes first and second shift registers. A first digital data signal is applied as an input to the first shift register and a second digital data signal, which is a phase shifted version of the first digital data signal, is applied to the second shift register. First and second clock signals are used to clock the shift registers, and these clock signals correspond in frequency but differ in phase with respect to one another. The outputs of the stages of the first and second delay lines are weighted by respective resistors which are connected to a summing node. The digital data signal has a data clocking rate, the first and second clock signals have a delay line clocking rate, and the data clocking rate is slower than the delay line clocking rate.

Digital transversal filter

A digital demodulator or receiver (22) having an interface (24) for receiving an input signal modulated with digital data, a multiplier (26) for multiplying the input signal with a local oscillator signal (LOa-LOd) to generate a product signal, and an integrator (38) for periodically integrating the product signal to generate a sequence of integrated signals, each having an amplitude indicative of a respective portion of the digital data, operates in a SEARCH mode to supply acquisition reference signals (1xi, 1xq, 2xi, 2xq) to the multipliers (36). The resulting integrated values (Ia-Id) are proportional to the sine and cosine of the pahse (.phi.) of the input signal. The polarities (Sa-Sd) of these integrated values (Ia-Id) are processed to estimate this phase (.phi.) and to generate a reset signal (RESYNC) for the receiver (22) at the appropriate time.

Growing community of inventors

Glen Ellen, CA, United States of America

Kevin A Jaeger