Samsung Electronics Co., Ltd.

Keun-cheol Hong

Hyun-woo Park

Byung-ho Min

Yoon-bum Seo

Sun-hee Park

An apparatus and method for controlling a memory interface are provided. The apparatus includes a memory controller controlling a memory and a clock generator applying a system bus clock signal and a memory clock signal to the memory controller. The memory controller applies a memory clock signal having a frequency higher than the frequency of the system bus clock signal to the memory. Accordingly, a high data transfer bandwidth can be obtained with the same cost and effort as for manufacturing a conventional system-on-chip (SOC) while using a memory having a high operating speed.

Apparatus and method for controlling memory interface

A protocol conversion and arbitration circuit may include: a protocol conversion circuit to receive signals complying with a second protocol used by a master, and to convert the received signals into signals complying with an intermediary protocol used by an internal bus of a slave; and a transform circuit to receive, from the protocol conversion circuit, and to convert the once-converted signals into signals complying with a first protocol used by the slave.

Protocol conversion and arbitration circuit, system having the same, and method for converting and arbitrating signals

In the analog-to-digital interfacing device, an input selector receives a plurality of analog signals and selectively outputs one of the analog signals based on a plurality of clock signals. An analog-to-digital converter converts the analog signals output from the selector to digital signals.

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Suwon-si, South Korea

Keun-cheol Hong