Credence Systems Corporation

Dcg Systems Gmbh

Ketan Shah

Theodore R Lundquist

Romain Desplats

Philippe Perdu

Mark Alan Thompson

Tamayasu Anayama

An improved method, apparatus, and control/guiding software for localizing, characterizing, and correcting defects in integrated circuits, particularly open or resistive contact/via defects and metal bridging defects, using FIB technology. An apparatus for identifying an abnormal discontinuity in a contact/via in an integrated circuit comprising a focused ion beam system to scan the ion beam over the contact/via to do remove or deposit via material, a detector to collect a secondary particle signal from the contact/via material that gets removed, a sub-system for storing the secondary particle signal from the contact/via in time as well as x-y scan position, a sub-system for correlating secondary particle signals and identifying discontinuities in the correlated secondary particle signals, a sub-system for optimizing the display of the abnormal discontinuity; and a computer to implement software aspects of the system.

FIB based open via analysis and repair

A system, apparatus, and method for analyzing photon emission data to discriminate between photons emitted by transistors and photons emitted by background sources. The analysis involves spatial and/or temporal correlation of photon emissions. After correlation, the analysis may further involve obtaining a likelihood that the correlated photons were emitted by a transistor. After correlation, the analysis may also further involve assigning a weight to individual photon emissions as a function of the correlation. The weight, in some instances, reflecting a likelihood that the photons were emitted by a transistor. The analysis may further involve automatically identifying transistors in a photon emission image.

Apparatus and method for detecting photon emissions from transistors

A system, apparatus, and method for analyzing photon emission data to discriminate between photons emitted by transistors and photons emitted by background sources. The analysis involves processing of integrated circuit computer aided design data to identify transistors within the CAD data. The analysis may further involve the use of Boolean operators to process the CAD data to particularly identify, such as through a channel, the location of the NMOS and PMOS gates, the location of the drain and source, or some combination of the location of the gate and drain or source to particularly identify the pinch-off region.

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Cupertino, CA, United States of America

Ketan Shah