Seiko Epson Corporation

Kenyou Nagao

Nobuyuki Saito

Shun Oshita

Kuniaki Matsuda

Shinsuke Kubota

Shuichi Yanagihara

Yuji Mikami

Takuya Ishida

Yoshiyuki Kamihara

Hironobu Kazama

Hiroaki Shimono

Yoshimi Oka

A data transfer control device for transferring data via a bus includes a buffer controller for controlling access to a data buffer in which a command block area, a data area and status block area are prepared, and a transfer controller for controlling data transfer. The transfer controller executes, a transaction of bulk OUT transfer in a command transport to automatically send a packet including command block data written in the command block area in response to an instruction to execute automatic bulk transfer, a transaction of one of bulk OUT transfer and bulk IN transfer in a data transport to automatically execute one of sending a packet including sending data written in the data area and receiving a packet including receiving data to be written in the data area, and a transaction of bulk IN transfer in a status transport to automatically receive a packet including status block data to be written in the status block area.

Bulk data transfer and buffer control device and electronic instrument

A data transfer control device for data transfer through a bus including a state execution circuit conducting each state process of first-Nth states in order to perform a state control of the data transfer control device, a transfer controller performing a control for the data transfer based on a result of the state process execution in the state execution circuit, a command register in which a state transition execution command is set, and a control circuit decoding the state transition execution command set in the command register and controlling the state execution circuit based on a result of the decoding, the control circuit controlling the state execution circuit to execute a Kth (1&#x2266;K&#x2266;N) state process if an individual state transition execution command that changes the state of the data transfer control device to the Kth state is set in the command register, and the control circuit controlling the state execution circuit to execute a plurality of state processes consecutively from a Lth (1&#x2266;L&#x2266;N) state to a Mth (1&#x2266;M&#x2266;N) state if a successive transition execution command is set in the command register, the successive transition execution command successively changing the state of the data transfer control device from the Lth state to the Mth state.

Data transfer control device with state transition control and electronic equipment

A data transfer control device having: a hub dedicated data storage section which stores a packet transferred between the data transfer control device and a hub; a packet transmission section which cyclically issues a token packet to the hub for asking whether the state of the hub has changed or not; a packet reception section which receives a response packet sent from the hub in response to the token packet; and a transfer controller which writes the response packet received by the packet reception section into the hub dedicated data storage section, and generates an interrupt which indicates that the state of the hub has changed.

Data transfer control device, electronic instrument, and data transfer control method

When transfer condition information is set and the start of automatic control transfer is instructed, a transfer controller (host controller) automatically issues a setup stage transaction and automatically transfers a setup stage packet, then, if there is data to be transferred, it automatically issues a data stage transaction and automatically transfers a data stage packet. It then automatically issues a status stage transaction and automatically transfers a status stage packet. Device request data, the total size of transfer data, data stage present/absent information, transfer direction in the data stage, and maximum packet size are set in transfer condition registers. A pipe region is allocated in the packet buffer during host operation of USB On-The-Go.

Data transfer control device, electronic equipment, and data transfer control method

A transaction is automatically issued with respect to one of end points and data is automatically transferred while the remaining data size of the transfer data is calculated based on the total size and the maximum packet size. When the remaining data size in the current transaction is less than the maximum packet size, the next transaction is issued automatically, and a short packet is transferred automatically to nest one of the end points. When the payload size of the packet to be transferred by the current transaction is the maximum packet size and the remaining data size of the transfer data is zero, a short packet of zero data length is transferred automatically to the next one of the end points. When DMA transfer is complete and the remaining data to be transferred is zero, a short packet of zero data length is transferred automatically in response to an IN token from a host. Data transfer according to USB On-The-Go is performed.

A data transfer control device including: a buffer controller which allocates a plurality of pipe regions in a packet buffer and controls access to the packet buffer; and a transfer controller which controls data transfer between the pipe regions and corresponding endpoints. The transfer controller performs processing of pausing data transfer between the pipe regions and the endpoints, the buffer controller performs reconstruction processing which includes at least one of deletion, addition, and size change of the pipe regions after the completion of the pause processing, and then the transfer controller resumes the paused data transfer after the reconstruction processing of the pipe regions. Data in the pipe regions before the reconstruction processing is copied to the pipe regions after the reconstruction processing while preventing the data from being erased.

Data transmission controller that restarts data transmission when reconstruction is completed

A signal state detection circuit of a data transfer control device notifies a processing of results detected by a line state detection circuit or a power supply line detection circuit by using an interrupt signal. The processing sets a state command corresponding to a state of a transition destination judged based on the notified detection results in a control register of a state controller. A state command decoder decodes the state command set in the control register and generates a control signal. A signal line control circuit controls a signal state of at least one of signal lines formed of data signal lines (D+ and D&#x2212;) and power supply lines (VBUS and GND) based on the control signal.

Data transfer control device, electronic equipment and data transfer control method

A state controller of a data transfer processing circuit switches an operation of an A-device or a B-device between a host operation and a peripheral operation by state transition. A power supply switch circuit connects a power supply circuit with a VBUS line based on transition of the state controller. A power supply switching circuit of a power supply control circuit connects the VBUS line or the power supply circuit with the data transfer processing circuit based on a switching signal. The switching signal is generated based on an output signal of a switch circuit or a control signal from the state controller.

Growing community of inventors

Sapporo, Japan

Kenyou Nagao