Raytheon Company

Senseeker Engineering, Inc.

Sionyx, Inc.

Other

Kenton T Veeder

Nishant Dhawan

John L Vampola

Micky R Harris

Sean P Kilcoyne

Jeffrey M Peterson

Christopher L Fletcher

Leonard P Chen

Sean McCotter

Robert E Mills

Aaron Bluestone

Christoph Von Jutrzenka Trzebiatowski

The present disclosure provides a current generation circuit. In one aspect, the circuit includes a current source transistor and a current sink transistor connected to the current source transistor in series, with respective sources of the current source and sink transistors being connected with each other at a common node. A voltage difference between respective gates of the current source and sink transistors defines a current value flowing through the series, the voltage difference being variable such that the current value is either time-dependent or time-independent. Respective drains of the current source and sink transistors provide a high resistance output necessary to provide a current source or sink function thereby rejecting influence of drain variation or error on the current value.

Charge transfer circuit for compact modulators

The present disclosure provides an analog counter circuit for use in a minimal-sized circuitry. The analog counter circuit of the present disclosure can provide much higher resolution versus power consumption and layout area as compared to conventional digital counters. The analog counter circuit of the present disclosure can also provide much better bias supply management, step accuracy, multi-element step uniformity and lower supply spiking as compared to conventional analog counter architectures. The compact size of the disclosed counter circuit allows better integration of arrayed elements, such as, an array of image sensing pixels or an array of artificial neurons.

Dynamic resistance element analog counter

The present disclosure provides a delta-sigma modulator circuit for use in a pixelated image sensor or a readout integrated circuit. In one aspect, the modulator circuit includes a dynamic resistance element configured to have a variable resistance that changes in accordance with a voltage difference across the dynamic resistance element.

Electronic circuit having dynamic resistance element

Methods and Systems for calibrating a Single Ramp Multiple Slope Analog to Digital Converter (SRMS ADC), the ADC including a counter and a plurality N of charge and discharge elements of different time constant i.e. slope, wherein the relationships between slopes is defined as a function of the shallowest slope Ssuch that S=K&#xb7;S, S=K&#xb7;S, . . . S=K&#xb7;Swhere the K values are integers, and the code count for conversion is C=K&#xb7;C+K&#xb7;C+ . . . K&#xb7;C+Cwhere each Crepresents an observed counts per each slope for a conversion, including; sampling for a first calibration pass a voltage with the ADC, discharging the voltage on the steepest slope for a number of counter counts C, charging and discharging on the remaining slopes up to Kto Kfor a number of counts per slope, Ce.g. Cto C, discharging the remaining voltage residue on the shallowest slope and note the count, C, sampling the same voltage on the ADC for a second calibration pass, discharging the voltage on the steepest slope for a modified number of counter counts C=C+/&#x2212;X, modifying the number of charge/discharge counts time Cfor the slopes Kto Kto adjust for the change expected from the modified steep slope discharge to reach the shallowest slope with the same expected residue as for the first calibration pass, discharging the remaining voltage residue on the shallowest slope and note the actual count, C, adjusting Kto Kbased on the difference between Cand C, and; using C=K&#xb7;C+K&#xb7;C+ . . . K&#xb7;C+Cas the count code for conversion.

Calibration for a single ramp multi slope analog-to-digital converter

Pixel Front end circuits particularly applicable to photodetectors requiring wide bias ranges and/or with high background currents. In various versions, wide bias ranges, short protection, and background current subtraction, both predetermined and automatically sampled, are disclosed.

Wide bias background subtraction pixel front-end with short protection

A light-sensing pixel for detecting at least a portion of the electromagnetic spectrum includes a first detector element having a micro-structured surface for detecting an infrared range of wavelengths of the electromagnetic spectrum. The light-sensing pixel further includes a second detector element for detecting a second range of wavelengths of the electromagnetic spectrum, wherein the second range of wavelengths is shorter than the first range of wavelengths and the first and second detector element are formed monolithically on a silicon substrate.

Response-enhanced monolithic-hybrid pixel

An optical detector includes a detector surface operable to receive light, a depleted field region coupled to the underside of the detector surface, a charge collection node underlying the depleted field region, an active pixel area that includes the portion of the depleted field region above the charge collection node and below the detector surface, and two or more guard regions coupled to the underside of the detector surface and outside of the active pixel area. The depleted field region includes an intrinsic or a near-intrinsic material. The charge collection node has a first width, and the guard regions are separated by a second width that is greater than the first width of the charge collection node. The guard regions are operable to prevent crosstalk to an adjacent optical detector.

High quantum efficiency optical detectors

Light is converted to an electric signal by performing a light-to-frequency conversion of the light received during a first phase of operation. Following the first phase of operation, a light-to-time conversion is performed on light received during a second phase of operation. Following the second phase of operation a digital representation of the light is generated in response to the light-to-frequency conversion and the light-to-time conversion.

Time-frequency fusion digital pixel sensor

A readout circuit for reading from addressable nodes comprises first and second half-circuits of a differential amplifier. The first half-circuit comprises at least one source follower transistor adapted to receive an input signal from one of the addressable nodes, such as pixel readouts of an imaging system. The first half-circuit further comprises a row selector switch coupled to the source follower transistor to selectively activate the source follower transistor to receive the input signal. The second half-circuit comprises an output node for providing an output signal of a readout of a selected addressable node. The second half-circuit further comprises a source leader transistor coupled to the output node to provide a feedback signal based on the readout. A feedback loop is connected to the source leader transistor to provide feedback from the output node for utilization in a differential amplification of the input signal.

Differential source follower source leader addressable node readout circuit

A system for converting an analog signal to a digital signal may include a plurality of converter stages. One of the converter stages may include a multiplying digital-to-analog converter (MDAC) and an analog-to-digital subconverter (ADSC). The MDAC may be configured to (i) receive from a previous stage a first residue analog signal and a first idealized digital signal representing a first portion of the digital signal and corresponding to the first residue analog signal; (ii) convert the first idealized digital signal to an idealized analog signal; and (iii) output a second residue analog signal based on the difference between the first residue analog signal and the idealized analog signal. The ADSC may be configured to convert the second residue analog signal into a second idealized digital signal representing a second portion of the digital signal and corresponding to the second residue analog signal, the ADSC comprising a sloping analog-to-digital converter.

System and method for analog-to-digital conversion

A light-sensing pixel is described that includes more than one detector element, each of which is sensitive to a range of wavelengths of the electromagnetic spectrums. The detectors are arranged in a readout circuit that can be constructed on a monolithic semiconductor product such that one or more of the detectors can be switched on or off to include or exclude an output contribution from said detectors and enhance the response of the pixel. Also, the detectors can included a laser-treated semiconductor sensor for efficient sensing of radiation in one or more regions of the spectrum. Arrays and imaging products using such pixels are disclosed.

A pixel for detecting at least a portion of the electromagnetic spectrum may be provided. The pixel includes a detector element for detecting at least a portion of the electromagnetic spectrum, a bias point coupled to an output of the detector element for applying a biasing voltage to the detector element and capable of affecting the electrical output of the first detector element, an interface-trap charge pump coupled to the output of the bias point for charge pumping current from the detector, a collection point coupled to the output of the bias point for accumulating an electrical output of the detector element, and an output point for providing an electrical output of the pixel.

Current subtraction pixel

In one embodiment, a method of preparing detectors for oxide bonding to an integrated chip, e.g., a readout integrated chip, includes providing a wafer having a plurality of detector elements with bumps thereon. A floating oxide layer is formed surrounding each of the bumps at a top portion thereof. An oxide-to-oxide bond is formed between the floating oxide layer and an oxide layer of the integrated chip which is provided in between corresponding bumps of the integrated chip. The oxide-to-oxide bond enables the bumps on the detector elements and the bumps on the integrated chip to be intimately contacted with each other, and removes essentially all mechanical stresses on and between the bumps. In another embodiment, a device has an interconnect interface that includes the oxide-to-oxide bond and an electrical connection between the bumps on the detector elements and the bumps on the integrated chip.

Growing community of inventors

Burlington, MA, United States of America

Kenton T Veeder