Rohm Co., Ltd.

National Institute of Advanced Industrial Science and Technology

Kentaro Tamura

Ken Nakahara

Masashi Kawasaki

Shunsuke Akasaka

Atsushi Tsukazaki

Akira Ohtomo

Hiroyuki Yuji

Kazutoshi Kojima

Keiko Masumoto

To provide silicon carbide epitaxial wafer in which occurrence of giant step bunchings (GSBs) caused by basal plane dislocations (BPDs) that occur during hydrogen etching is suppressed on low off-angle silicon carbide substrate to decrease surface defect density of epitaxially grown layer to allow formation of silicon carbide semiconductor device having high reliability, method for manufacturing the wafer, and apparatus for manufacturing the wafer, and silicon carbide semiconductor device having the wafer. A silicon carbide epitaxial wafer of the present invention is such that epitaxially grown layer is disposed on silicon carbide substrate which has &#x3b1;-type crystal structure and in which (0001) Si face is tilted at greater than 0&#xb0; and less than 5&#xb0;, wherein surface defect density of the epitaxially grown layer based on giant step bunching caused by basal plane dislocation on substrate surface of the silicon carbide substrate is &#x2266;20/cm.

Silicon carbide epitaxial wafer, method for manufacturing silicon carbide epitaxial wafer, device for manufacturing silicon carbide epitaxial wafer, and silicon carbide semiconductor element

There is provided a zinc oxide based compound semiconductor device in which drive voltage is not raised, property of crystal is satisfactory and device characteristics is excellent, even when the semiconductor device is formed by forming a lamination portion having a hetero junction of the ZnO based compound semiconductor layers. The zinc oxide based compound semiconductor device includes a substrate () made of MgZnO (0&#x2266;x&#x2266;0.5), the principal plane of which is a plane A (11-20) or a plane M (10-10), and single crystal layers () to () made of zinc oxide based compound semiconductor, which are epitaxially grown on the principal plane of the substrate () in such orientation that a plane parallel to the principal plane is a plane {11-20} or a plane {10-10} and a plane perpendicular to the principal plane is a plane {0001}.

Zinc oxide based compound semiconductor device

A p-type MgZnO-based thin film () is formed on a substrate () made of a ZnO-based semiconductor. The p-type MgZnO-based thin film () is composed so that X as a ratio of Mg with respect to Zn therein can be 0&#x2266;X&#x3c;1, preferably 0&#x2266;X&#x2266;0.5. In the p-type MgZnO thin film (), nitrogen as p-type impurities which become an acceptor is contained at a concentration of approximately 5.0&#xd7;10cmor more. The p-type MgZnO thin film () is composed so that n-type impurities made of a group IV element such as silicon that becomes a donor can have a concentration of approximately 1.0&#xd7;10cmor less. The p-type MgZnO thin film () is composed so that n-type impurities made of a group III element such as boron and aluminum which become a donor can have a concentration of approximately 1.0&#xd7;10cmor less.

p-Type MgZnO-based thin film and semiconductor light emitting device

Provided is a ZnO-based semiconductor device capable of growing a flat ZnO-based semiconductor layer on an MgZnO substrate having a main surface on the lamination side oriented in a c-axis direction. ZnO-based semiconductor layerstoare epitaxially grown on an MgZnO (0&#x2266;x&#x3c;1) substratehaving a +C surface (0001), as a main surface, inclined at least in an m-axis direction. A p-electrodeis formed on the ZnO-based semiconductor layer, and an n-electrodeis formed on the underside of the MgZnO substrate. Thereby, steps regularly arranged in the m-axis direction can be formed on the surface of the MgZnO substrate, and a phenomenon called step bunching is prevented. Consequently, the flatness of a film of the semiconductor layers laminated on the substratecan be improved.

ZnO-based semiconductor device

A semiconductor light emitting device is provided, in which the light emitting efficiency of a LED is improved. A semiconductor light emitting device () includes a light emitting layer () made of a GaN-based semiconductor sandwiched with an n-type GaN-based semiconductor layer () and a p-type GaN-based semiconductor layer (), and a ZnO-based or an ITO transparent electrode layer (). Further, a value of an equation represented by 3t/(A/&#x3c0;)&#x2212;3(t/(A/&#x3c0;))+(t/(A/&#x3c0;))is 0.1 or more, where a thickness of the transparent electrode layer is represented by t and an area of the light emitting layer (light emitting area) of the light emitting device () is represented by A. The light emitting efficiency is improved using the transparent electrode layer () having an optimum thickness to the light emitting area.

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Kyoto, Japan

Kentaro Tamura