Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Kentaro Shiomi

Makoto Fujiwara

Akira Motohara

Toshiyuki Yokoyama

Katsuya Fujimura

Tomoya Sato

Takehisa Hirano

Kazuya Shimizu

Rie Itou

Koichiro Fue

In a set device having a card host LSI, high-speed data transmission to a removable card or the like is realized without hindering a reduction in size and weight. The card host LSI and the removable card are connected to a card bus complying with predetermined card bus specifications. A microcomputer module and the card host LSI are connected also by a card bus complying with the predetermined card bus specifications.

Card host LSI and set device including the same

In the case where a target device stores: m keys {Ka, . . . , Kam} (m is a natural number) in a manner that the Kai (i is a natural number satisfying 1&#x2266;i&#x2266;m) is encrypted with the Ka (i&#x2212;1); and n keys {Kb, . . . , Kbn} (n is a natural number) in a manner that the Kbj (j is a natural number satisfying 1&#x2266;j&#x2266;n) is encrypted with the Kb (j&#x2212;1), a confidential information processing unit is caused to perform a processing of re-encrypting the encrypted key Enc (Kai, Ka (i&#x2212;1)), which has been encrypted with the Ka (i&#x2212;1), by using the Kb (j&#x2212;1) and outputting as an encrypted key Enc (Kai, Kb (j&#x2212;1)).

Confidential information processing host device and confidential information processing method

An encryption process is employed in the LSI design so as to improve confidentiality of the circuit design data over conventional examples. In the encryption process, confidential circuit design data is encrypted to produce encrypted design data and a cipher key. The encrypted design data is provided to the user who conducts a design/verification process. The key is also provided as required. In the design/verification process, the encrypted design data is subjected to various processes without disclosing the contents of the original circuit. In a decoding process, the encrypted design data subjected to the design/verification process is decoded to produce original circuit design data.

LSI design method and verification method

The present invention provides a semiconductor device, in which a plurality of chip IPs are mounted onto a common semiconductor circuit board, an evaluation method for the same, and a function setting method for the same. Various IP groups can be mounted as chip IPs onto a silicon circuit board. The silicon circuit board includes a silicon substrate, a wiring layer and pads. IPs (chip IPs) are mounted onto the pads by lamination. Means for selecting, switching and setting the functions of the IPs are provided, making the semiconductor device suitable for small-variety mass-production.

Semiconductor device, function setting method thereof, and evaluation method thereof

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Kyoto, Japan

Kentaro Shiomi