Renesas Electronics Corporation

Renesas Technology Corp.

Kensuke Ishikawa

Tatsuyuki Saito

Takayuki Oshima

Junji Noguchi

Tsuyoshi Tamaru

Hizuru Yamaguchi

Noriko Miura

Kiyomi Katsuyama

Tomio Iwasaki

Hiroshi Ashihara

Toshio Saito

Masanori Miyauchi

Tomio Iwaskai

Hiroyuki Ohta

Osamu Inoue

Hiromi Shimazu

Toshio Saitoh

The reliability of wirings, each of which includes a main conductive film containing copper as a primary component, is improved. On an insulating film including the upper surface of a wiring serving as a lower layer wiring, an insulating film formed of a silicon carbonitride film having excellent barrier properties to copper is formed; on the insulating film, an insulating film formed of a silicon carbide film having excellent adhesiveness to a low dielectric constant material film is formed; on the insulating film, an insulating film formed of a low dielectric constant material as an interlayer insulating film is formed; and thereafter a wiring as an upper layer wiring is formed.

Semiconductor device and manufacturing method thereof

In manufacturing a semiconductor integrated circuit device, an interconnect trench and a contact hole are formed in an interlayer insulating film formed over a first-level interconnect on a semiconductor substrate, a barrier film is formed inside of the trench and contact hole so that its film thickness increases from the center of the bottom of the hole toward the sidewalls all around the bottom of the contact hole, a copper film is formed over the barrier film, and a second-level interconnect and a connector portion (plug) are formed by polishing by CMP. In this way, the geometrically shortest pathway of an electrical current flowing from the second-level interconnect toward the first-level interconnect through a connector portion (plug) does not coincide with a thin barrier film portion which has the lowest electrical resistance, so that the current pathway can be dispersed and a concentration of electrons does not occur readily.

Semiconductor integrated circuit device and a method of manufacturing the same

A reliable semiconductor device having a multilayer wiring structure formed of copper as a main component material, which constrains occurrence of voids caused by stress migration. In the multilayer wiring structure, a first insulation layer having a high barrier property and a compression stress, and making contact with the upper surface of a first wiring made of copper as a main component material, a second insulation film having a tensile stress, and a third insulation film having a dielectric constant which is lower than those of the first and second insulation film, are laminated one upon another in the mentioned order as viewed the bottom thereof, and a via hole is formed piercing through the first insulation film, the second insulation film and the third insulation film, making contact with the first wiring.

Semiconductor device

Growing community of inventors

Ome, Japan

Kensuke Ishikawa