Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Panasonic Intellectual Property Management Co., Ltd.

Kenshi Kanegae

Hideo Nakagawa

Shinichi Imai

Akihiko Tsuzumitani

Atsushi Ikeda

Takayuki Yamada

Masaru Yamada

Yoichi Yoshida

A semiconductor device includes, on a semiconductor substrate, a gate insulating film, a pMIS metal material or an nMIS metal material, a gate electrode material, and a gate sidewall metal layer.

Semiconductor device including a field effect transistor

In order that a top surface of a gate electrode does not have sharp portions, ends of the top surface of the gate electrode are rounded before refractory metal is deposited for silicidation. This reduces intensive application of film stresses which are generated in heat treatment, enabling formation of a silicide layer with a uniform, sufficient thickness.

Semiconductor device and manufacturing method thereof

An element larger than silicon is ion-implanted to a contact liner in an N-channel region to break constituent atoms of the contact liner in the N-channel region. An element larger than silicon is ion-implanted to the contact liner in a P-channel region to break constituent atoms of the contact liner, oxygen or the like is ion-implanted. Thereafter, heat treatment is performed to cause shrinkage of the contact liner in the N-channel region to form an n-channel contact liner, and to cause expansion of the contact liner in the P-channel region to form a p-channel contact liner.

An organic/inorganic hybrid film represented by SiCHO(x&#x3e;0, y&#x2267;0, z&#x3e;0) is plasma-etched with an etching gas containing fluorine, carbon and nitrogen. During the etching, a carbon component is eliminated from the surface portion of the organic/inorganic hybrid film due to the existence of the nitrogen in the etching gas, to thereby reform the surface portion. The reformed surface portion is nicely plasma-etched with the etching gas containing fluorine and carbon.

Etching method, semiconductor and fabricating method for the same

A gate electrode of one of an nFET and a pFET includes a metal-containing layer in contact with a gate insulating film and a first silicon-containing layer formed on the metal-containing layer, and a gate electrode of the other FET includes a second silicon-containing layer in contact with a gate insulating film and a third silicon-containing layer formed on the second silicon-containing layer. The first silicon-containing layer and the third silicon-containing layer are formed by the same silicon-containing material film.

Semiconductor device and method for manufacturing the same

A semiconductor device includes an Nch transistor having a first gate electrode and a Pch transistor having a second gate electrode. The first gate electrode and the second gate electrode are made of materials causing stresses of different magnitudes.

Semiconductor device and manufacturing method thereof with rounded gate including a silicide on the top and at the corners

After forming a resist pattern on an insulating film deposited on a semiconductor substrate, the insulating film is subjected to plasma etching using an etching gas including carbon and fluorine with the resist pattern used as a mask. A polymer film having been deposited on the resist pattern during the plasma etching is subjected to a first stage of ashing with a relatively low chamber pressure and relatively low plasma generation power by using an oxygen gas or a gas including oxygen as a principal constituent. A residual polymer present on the insulating film in completing the first stage of the ashing is subjected to a second stage of the ashing with a relatively high chamber pressure and relatively high plasma generation power by using an oxygen gas or a gas including oxygen as a principal constituent.

Method for fabricating semiconductor device

A peeling film is deposited on an insulating film, which is formed on a semiconductor substrate and has a hole, and on the bottom and the wall of the hole so as not to fill the hole with the peeling film. A resist film is formed over the peeling film so as to fill the hole. A resist pattern is formed by patterning the resist film so as to form an interconnect groove opening around the hole and to allow a portion of the resist film to remain within the hole. The peeling film and the insulating film are etched by using the resist pattern as a mask, so as to form an interconnect groove continuous with the hole in the insulating film. After removing the resist pattern, a remaining portion of the peeling film is removed.

An organic/inorganic hybrid film represented by SiC H O (x>0, y&gE;0, z>0) is plasma-etched with an etching gas containing fluorine, carbon and nitrogen. During the etching, a carbon component is eliminated from the surface portion of the organic/inorganic hybrid film due to the existence of the nitrogen in the etching gas, to thereby reform the surface portion. The reformed surface portion is nicely plasma-etched with the etching gas containing fluorine and carbon.

Growing community of inventors

Osaka, Japan

Kenshi Kanegae