Lsi Logic Corporation

Trilicon LLC

Kenneth Stanley Szajda

Todd A Randazzo

Matthew Russell

Jonathan Alois Schmitt

Kenneth G Richardson

Scott C Savage

Edson Wayne Porter

Hoang P Nguyen

Timothy McGonagle

A system for providing hardware-based cybersecurity for 'smart' devices includes a security device implemented without the use of microprocessors for critical security functions and an electrically separable device for removal or disconnection of certain security functions. The security device acts a security bridge between the microprocessor core(s) of the protected system and the rest of the protected system. The security device controls access to a protected storage area that holds microprocessor code and/or data for the protected system, and blocks or otherwise prevents execution of any code not present in the protected storage area. The electrically separable device is cryptographically matched to a single instance of a protected system and contains circuitry required to load, remove, or alter any information in the protected storage area. The electrically separable device can also be used for secure communication over a public network to and from the protected system.

Hardware-based system for cybersecurity protection of microprocessor systems

A level shifter circuit configured for use between a core of a chip and input/output transistor of the chip in order to shield low voltage devices residing on the core. The level shifter circuit includes voltage tolerant native devices which have VDDCORE on their gates, and each voltage tolerant native device is cascoded with a low voltage transistor on the core.

CMOS level shifters using native devices

An integrated circuit having input output buffers, where the integrated circuit is powered by at least a core power supply and an input output power supply. A level shifter receives an active low signal that indicates that the core power supply has powered down. The level shifter then outputs a known state upon receipt of the active low signal. A control circuit receives the known state form the level shifter, and then tristates the input output buffers upon receipt of the known state.

Control circuit for power

A low-gain, low-jitter VCO circuit implemented in CMOS provides center frequency adjustment to overcome process variations. Further, noise immunity is improved by using a separate feedback loop to provide the nominal current biasing for the oscillator chain. This feedback loop coarsely sets the center frequency. The actual control of the oscillation frequency is achieved by a second current source, whose output is added to the nominal bias current to provide a total bias to the oscillator. This second current source 'fine tunes' the oscillator frequency responsive to a control signal. Because two separate current sources are used, the circuit can realize a high oscillation frequency with a low VCO gain. Another feature provides for adjusting the center frequency in response to a digital input word provided via external pins, or from internal logic or memory. The center frequency thus can be calibrated by measurement at the time of manufacture, or changes later by the end user or by other circuitry.

Growing community of inventors

Holliston, MA, United States of America

Kenneth Stanley Szajda