International Business Machines Corporation

Kenneth Rowe

James William Adkisson

John Maxwell Cohn

Leendert M Huisman

Leah M P Pastel

Thomas Gregory Sopchak

Phillip J Nigh

Greg Bazan

David E Sweenor

Francis Gravel

A method for defect diagnosis of semiconductor chip. The method comprises the steps of (a) identifying M design structures and N physical characteristics of the circuit design, wherein M and N are positive integers, wherein each design structure of the M design structures is testable as to pass or fail, and wherein each physical characteristic of the N physical characteristics is present in at least one design structure of the M design structures; (b) for each design structure of the M design structures of the circuit design, determining a fail rate and determining whether the fail rate is high or low; and (c) if every design structure of the M design structures in which a physical characteristic of the N physical characteristics is present has a high fail rate, then flagging the physical characteristic as being likely to contain at least a defect.

Defect diagnosis for semiconductor integrated circuits

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Burlington, VT, United States of America

Kenneth Rowe