Burroughs, Inc.

Unisys Corporation

Kenneth N Abel

Terrence Evan Lewis

Gerald R Dunn

John E Rudy

This invention is an improvement to an integrated circuit package which is of a type that includes a package body with multiple chip attach regions for holding respective integrated circuit chips, signal pads around the chip attach regions, an array of I/O pins on the package body, a first set of conductors in the package body which selectively connect some of the signal pads to the I/O pins, and a second set of conductors which selectively connect some of the signal pads to each other but not to any I/O pins. This improvement enhances the testability of the package at its intermediate state of manufacture, and it comprises: (a) a test region in the package body which is spaced apart from the I/O pins, the chip attach regions, the signal pads, and the first and second sets of conductors; (b) an array of test pins which is attached to the test region of the package body; and (c) a third set of conductors which are disposed in the package body that selectively connect the I/O pins to the signal pads and the first and second sets of conductors such that all conductive paths can be tested for shorts and/or opens via the test pins and the I/O pins. Then, after testing is complete, the test region of the package body is permanently removed from the remainder of the package by a step such as sawing.

Integrated circuit package having a removable test region for testing

A method is disclosed for removing an integrated circuit package that has multiple leads which are soldered into respective metal plated holes in a printed circuit board. The board is of the type that has internal metal lines which make joints with the metal plating, and the method is adapted to remove the package from the board without overstressing the joints. The method includes the steps of: flowing a liquid on the leads at a temperature higher than the melting temperature of the solder without pulling on the package for a time period .DELTA.t.sub.1 ; and pulling on the package immediately after the end of the .DELTA.t.sub.1 period with a force F.sub.1 =F.sub.3 +(25 to 75)% F.sub.2. Force F.sub.2 is the minimum force that will extract a single soldered lead from the board under the condition the solder is below but within 5.degree. C. of melting; F.sub.3 is the minimum force that will lift the package from a pool of the liquid; and .DELTA.t.sub.1 is the time it takes to pull the package from the board with force F.sub.1 being continuously applied while the liquid is flowing on the package leads to melt the solder plus one to three seconds.

Method of removing a soldered integrated circuit package from a printed

A semiconductor device package and a method of making it. A woven fiber mat impregnated with an epoxy adhesive serves as a first housing member. It includes an opening therein for receiving a semiconductor device. The housing member is placed on a supporting heat sink and a lead frame placed on top of the housing member. This subassembly is heated to bond the elements together by curing the epoxy adhesive in the first housing member. A similar second housing member is then placed over the lead frame. The second housing member includes an opening therein which is slightly larger than the opening in the first housing member. A lid is placed on top of the second housing member to cover the opening after the semiconductor device has been bonded to the substrate within the openings in the housing members. The assembly is then again heated to bond the remaining elements together with the epoxy adhesive in the second housing member to form a completed package.

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Vista, CA, United States of America

Kenneth N Abel