International Business Machines Corporation

Eastman-kodak Company

Akoustis, Inc.

Kenneth Michael Fallon

Voya Rista Markovich

Hormazdyar M Dalal

Miguel Angel Jimarez

John M Lauffer

William E Wilson

Roy H Magnuson

Gene J Gaudenzi

Ross William Keesler

John A Welsh

Charles Francis Scaglione

Charles F Carey

Marybeth Perrino

Jim P Paoletti

Irv Memis

Douglas Oliver Powell

Richard Stuart Zarr

Gary Paul Vlasak

Mark Vincent Pierson

Lawrence H White

Christian Robert Le Coz

Georges Henri Robert

Frederic Robert Pierre

Alexis Bitaillou

Mark Rudolf Bentlage

Kenneth Robert Herman

Charles Gerard Woychik

Jeffrey Blanton Shealy

William H Ma

Mary Winters

Dae Ho Kim

Cynthia Susan Milkovich

Joseph Edward Zdimal

Rochelle Ginsburg

A method and structure for a transfer process for an acoustic resonator device. In an example, a bulk acoustic wave resonator (BAWR) with an air reflection cavity is formed. A piezoelectric thin film is grown on a crystalline substrate. One or more patterned electrodes are deposited on the surface of the piezoelectric film. An etched sacrificial layer is deposited over the one or more electrodes and a planarized support layer is deposited over the sacrificial layer. The support layer is etched to form one or more cavities overlying the electrodes to expose the sacrificial layer. The sacrificial layer is etched to release the cavities around the electrodes. Then, a cap layer is fusion bonded to the support layer to enclose the electrodes in the support layer cavities.

Piezoelectric acoustic resonator manufactured with piezoelectric thin film transfer process

A method of forming a printed circuit card with a metal power plane layer between two photoimageable dielectric layers is provided. Photoformed metal filled vias and plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials connected to the vias and plated through holes. A border may be around the card including a metal layer terminating in from the edge of one of the dielectric layers. Copper foil with clearance holes is provided. First and second layers of photoimageable curable dielectric material are on opposite sides of the copper. Patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. Through holes are developed where holes were patterned in both dielectric layers. The surfaces of the photoimageable material, vias and through holes are metallized by copper plating, preferably using photoresist.

Method of forming printed circuit card

A method of forming a printed circuit card with a metal power plane layer between two photoimageable dielectric layers is provided. Photoformed metal filled vias plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials connected to the vias and plated through holes. A border may be around the card including a metal layer termination in from the edge of one of the dielectric layers. Copper foil with clearance holes is provided. First and second layers of photoimageable curable dielectric material are on opposite sides of the copper. Patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. Through holes are developed where holes were patterned in both dielectric layers. The surfaces of the photoimageable material, vias and through holes are metallized by copper plating, preferably using photoresist.

A method of constructing a liquid crystal display element or similar article of manufacture includes providing a first transparent substrate bondable to a second transparent substrate. The second transparent substrate has a plurality of vias passing through opposing active faces. A dispensing technique is used to fill the vias void-free with an optical grade adhesive material to form the LCD element.

Method of constructing a liquid crystal display element that includes dispensing an optical grade adhesive to fill vias in a transparent substrate

A substrate is provided with vias communicating with surface contacts or bumps. Joining material paste is forced through holes in a screen onto an area array of the contacts on the substrate then the screen is biased against the substrate as the paste is heated and cooled to transfer the joining material onto the contacts. Alternately, joining material paste is forced into the screen and then a substrate is placed onto the screen with an area array of bump contacts of the substrate in contact with the solder paste, and then the paste is heated and cooled to transfer the material onto the bumps. The joining material may be a solder paste, conductive adhesive paste, or transient liquid bond paste. The substrate may be a semiconductor chip substrate, flexible or rigid organic substrate, or a metal substrate coated to form a dielectric surface. Also, the substrate may be a computer chip, chip carrier substrate or a circuit board substrate. The process may be used to produce flip chips, ball grid array modules, column grid array modules, circuit boards, and attachment structures of the preceding components including information handling systems.

Systems interconnected by bumps of joining material

A method of forming a printed circuit board or circuit card is provided with a metal layer which serves as a power plane sandwiched between a pair of photoimageable dielectric layers. Photoformed metal filled vias and photoformed plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials and connected to the vias and plated through holes. A border may be around the board or card including a metal layer terminating in from the edge of one of the dielectric layers. A copper foil is provided with clearance holes. First and second layers of photoimageable curable dielectric material is disposed on opposite sides of the copper which are photoimageable material. The patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. At the clearance holes in the copper, through holes are developed where holes were patterned in both dielectric layers. Thereafter, the surfaces of the photoimageable material, vias and through holes are metalized by copper plating. This is preferably done by protecting the remainder of the circuitry with photoresist and utilizing photolithographic techniques. The photoresist is thereafter removed, leaving a circuit board or card having metalization on both sides, vias extending from both sides to the copper layer in the center, plated through holes connecting the two outer circuitized copper layers.

Two signal one power plane circuit board

An apparatus introduces fluid in vias formed in an LCD element free of voids or air bubbles in the fluid material. A support base secures the LCD element in place during fluid flow from a fluid dispenser positioned proximate to the LCD element. Fluid flow is facilitated by thermal energy from a heating element arranged in thermal contact with the support base.

Apparatus for introducing a fluid into vias formed in a liquid crystal display element

A method of delivering fluid into constricted openings arranged in a workpiece substantially eliminates the occurrence of voids or air bubbles in the fluid filling the constricted orifices. Coextensive recesses are formed in a support base for securing the workpiece from movement during fluid flow. The constricted openings are exposed to the recesses so that fluid introduced into the openings do not overflow.

Method of delivering fluid into constricted openings free of voids

A liquid crystal display and method of making same has a first transparent substrate bondable to a second transparent substrate. The second transparent substrate has a plurality of vias passing through opposing active surfaces of the second transparent substrate. Vias are filled void-free with an optical grade adhesive material when the first and second transparent substrates are bonded together.

Liquid crystal display and method of making same

A method and structure for a solder interconnection, using solder balls for making a low temperature chip attachment directly to any of the higher levels of packaging substrate is disclosed. After a solder ball has been formed using standard methods it is reflowed to give the solder ball a smooth surface. A layer of low melting point metal, such as, bismuth, indium or tin, preferably, pure tin, is deposited on the top of the solder balls. This structure results in localizing of the eutectic alloy, formed upon subsequent low temperature joining cycle, to the top of the high melting solder ball even after multiple low temperature reflow cycles. This method does not need tinning of the substrate to which the chip is to be joined, which makes this method economical. It has also been noticed that whenever temperature is raised slightly above the eutectic temperature, the structure always forms a liquid fillet around the joint with copper wires. This liquid fillet formation results in substantial thermal fatigue life improvement for reduced stress at interface; and secondly, provides an easy means to remove chip for the purpose of chip burn-in, replacement or field repairs.

Method for forming reflowed solder ball with low melting point metal cap

Reflowed solder ball with low melting point metal cap

An electronic package comprising an integrated circuit chip and a flip chip solder bonded thereto is provided. The integrated circuit chip has circuitry over a major surface thereof and has peripheral wire or tab bond pads surrounding an array of C4 connection pads located over this major surface. A flip chip is solder bonded to the C4 connection pads.

Microelectronic package and fabrication thereof

A process within substrate is provided with vias communicating with surface contacts or bumps. Joining material paste is forced through holes in a screen onto an area array of the contacts on the substrate then the screen is biased against the substrate as the paste is heated and cooled to transfer the joining material onto the contacts. Alternately, joining material paste is forced into the screen and then a substrate is placed onto the screen with an area array of bump contacts of the substrate in contact with the solder paste, and then the paste is heated and cooled to transfer the material onto the bumps. The joining material may be a solder paste, conductive adhesive paste, or transient liquid bond paste. The substrate may be a semiconductor chip substrate, flexible or rigid organic substrate, or a metal substrate coated to form a dielectric surface. Also, the substrate may be a computer chip, chip carrier substrate or a circuit board substrate. The process may be used to produce flip chips, ball grid array modules, column grid array modules, circuit boards, and attachment structures of the preceding components including information handling systems.

Process for transferring material to semiconductor chip conductive pads

The present method employs a first plating resist for forming circuit lines on a carrier substrate. While the plating resist is still in place a metal, such as nickel, is deposited on top of the circuit lines. A second plating resist is employed for plating solder on the circuit lines at solder sites. At this stage additional solder can be deposited at each solder site to provide or supplement the necessary low melt solder required for forming a solder joint. The first and second resists along with solder thereon are then stripped and copper foil on the carrier substrate is etched away around the circuit lines. A soldermask is then formed on the carrier substrate over the circuit lines except for circuit lines in the chip sites. The soldermask has a single large opening at each chip site which has lateral dimensions which are slightly larger than the lateral dimensions of the chip to be connected at the chip site. During curing of the soldermask, which involves heat, the nickel layer on top of the circuit lines within the chip site opening quickly oxidizes to provide solder dams which extend along the lengths of the lines within the chip site openings immediately adjacent the solder sites. The chips are then placed within the soldermask windows and electrically connected by solder joints to the solder sites of the circuit lines by a flip chip attach method. The chip sites are then encapsulated with an underfill encapsulant to protect the solder joints.

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Vestal, NY, United States of America

Kenneth Michael Fallon