Unisys Corporation

Burroughs, Inc.

Kenneth Lindsay York

John E Legory

Thayer Lindsay York

Peter R Annal

Oscar B Stram

An N-way set associative data cache system comprises a cache controller adapted to receive a request for data and instructions. The cache controller includes a cache buffer register for storing the requests for a line of information in the form of a page tag address and line address. The line address is stored in the buffer register as a pointer into a directory associated with each of the N-ways for determining where the line being accessed resides. If the page tag address matches one of the page entry addresses in one of the directories, there is a hit, but if not, the line of data must be fetched by a cache fill request. The line of data is retrieved from an L2 cache or main memory and written into the line of one of the ways at the line address being accessed. A novel LRU ordering tree or look-up table is provided for determining concurrently the one line in the number of N-lines in the cache to be replaced with the new line of data in the event of a miss.

High speed LRU line replacement system for cache memories

In a system for enhancing the integrity of transmitted data files from one memory to a remotely located memory there is provided an original data stream which is compressed by a known data compression code. The compressed data stream may be in a variable length format and is not provided with the usual parity code bits. To assure that compressed data is received both without loss and error free, the compressed data stream is divided into groups of n blocks having N bytes. At the end of the group of nN byte blocks, a block or check code is inserted into the compressed data stream. The transmitted and received compressed data stream is processed as n blocks of N bytes having a received block check code. The received blocks of data are used to generate new block check codes which are compared with the transmitted block check codes to determine if a one bit error has occurred in any of the n blocks of N bytes. If an error occurs in the transmission of compressed data, the block is not stored in the memory of the receiver and the transmitter is requested to resend the entire group of n blocks of N bytes until no error in transmission is detected. The same system for enhancing the integrity of a transmitted data file can be employed with data that is double data compressed and/or encrypted.

Integrated block checking system for rapid file transfer of compressed data

In a data decompression system of the type having a self-compiling dictionary for building or replicating codes used for decoding incoming code values, there is provided a decoded string dictionary or memory for storing plural characters representing decoded strings. The decoded strings may be stored in a modified dictionary replacing string codes or stored in a separate variable length memory as blocks of characters having predetermined length and accessed using a finder memory. If the decoded string becomes too long to be stored in a fixed length memory, a conventional decoder dictionary may be used to reduce the size of the strings stored for direct access and read out to a recovered data stream.

Method and apparatus for reducing the time required for decompressing compressed data

In a system for economically and continuously transmitting data files from one location to a remote location there is provided a high speed mainframe computer adapted to read a data file and to determine if the process to be performed on the data requires a large amount of mainframe processor cycle time. If so the data file is down loaded to a memory accessible by a much less expensive single chip type dedicated computer that is particularly well suited to perform the process that would require high mainframe processor time cost. The output of the dedicated computer in coupled to a communication network for transmittal to the remote location. In the preferred embodiment-of the present invention first-in-first-out (FIFO) data queues are employed to maintain optimum utilization of the dedicated computer and transfer of the data files.

System for high speed continuous file transfer processing of data files

The present invention provides a novel method and system for obtaining maximum system speed performance for compressing coded data characters in a serial data stream by replacing strings of data with code values stored in a dictionary when strings are first observed as unique strings in the data stream. A novel pointer address is generated to represent new strings to be searched in the dictionary. The novel pointer address comprises a string code portion representative of the last matched string found in the dictionary and appended thereto an extension character code portion representative of the next character taken from the input data stream. The dictionary is constructed large enough to provide a unique memory location for every possible pointer address. The unique pointer address, representative of a string of data in the input data stream, is employed as an address pointer to access the memory. If no data is in memory at the address pointer the string has not been previously observed and a new unique compression code is stored at the pointer address in memory for the string so that the next identical pointer address will read the code for the string from the dictionary. Accordingly, every memory address accessed in the dictionary with the unique address pointer immediately causes a HIT or a MISS in the dictionary. A HIT produces the last matched string code for generating a new address pointer indicative of a longer string when the extension character code is appended onto the last matched string code to provide the next new pointer address.

Method and apparatus for reducing the time required for compressing data

A high speed data transfer mechanism for transferring files from a transmission host across a data link to a receiver host. First, data is presented to a data splitter. The data splitter separates the input data stream into N separate substreams by packaging data into packets, which may be of different sizes. As data is packetized, each packet is sent and presented to a separate data transmitter. Data is sent to the array of transmitter in round-robin fashion such that the data is first presented to the first transmitter, then to the second transmitter, and so on until each transmitter has been sent a packet, then the first transmitter is sent another, and so on, until all data packets have been sent to a transmitter. A receiving side of the mechanism then initializes as many receivers as needed, or as many data receive substreams as are required using as many receivers as are available, ideally an equal number to the transmitters. A substream reassembly unit reassembles data packets into a final output stream.

System for high-speed transfer of a continuous data stream between hosts

In a named-data hierarchical memory system wherein data is stored in pages at each memory level, a word valid bit to indicate the presence of data and a word modified bit is appended to each data word and associated detection and control apparatus is provided to permit the page oriented data to be stored and fetched on a word basis at each memory level. The detection and control logic functions to store only the data words in a page which contain actual data and to operate each level as a storage queue for the next lower level thereby eliminating the requirement and associated time delay of prefetching a page from the lower level before storage of any data words therein at the higher level.

Data word handling enhancement in a page oriented named-data

In a named data processing system having a plurality of memory modules, each module therein having a plurality of locations for storing data pages and the like, a memory address translation apparatus and method translates a data job name and associated segmented address field into a memory module-page addressing pair wherein each and every storage location may be accessed by each and every job name. The job name and the associated segmented address field are each partitioned into most and least significant bit fields. Through translation a storage location is defined by the exclusive ORing of the least significant fields of the data job name and segmented address field. Likewise a memory module is defined by the exclusive ORing of the most significant fields of the job name and the segmented address field as permuted by an exclusive ORing with the least significant field of the segmented address field. Preferably, in order to increase address spacing activity, the most significant field of the job name is processed through a Fibonacci hashing process before any exclusive ORing process.

Memory address translation system for accessing memory locations via job

In a named data processing system, user ownership and verfication of data records is secured by assigning an unique record name to each data record, providing error checking covering both the data record and its associated record name, storing the data record, its associated record name and check code, and requiring the data record name to be provided in order to initiate a fetch operation. Further, the check code enables upon fetching, a verification that an incorrect data record was not inadvertantly fetched due to hardware or other failures. The association of a unique data name with each data record provides for self-descriptive data records thereby permitting the reconstruction of directories which describe the contents of various actual physical locations within an Input/Output system when such directions are lost or otherwise corrupted by hardware or other malfunctions.

Method and apparatus for enhancing I/O transfers in a named data

An error control system for named data functions in a hierarchical memory system environment requiring only a single error-control encoding for each data word used therein. Each level of memory in the hierarchy thereof includes a data word storage device preceded by an error checking circuit to validate and correct when possible data to be stored therein. A translator operates upon the data name of the data word to be stored to indicate the area or portion of the storage device in which the data word is to be stored. A directory table associates data names with data word locations in the storage device, and a search mechanism fed by the translator searches the directory table in the area or portion so indicated for a data word location in the storage device to store the data word. If a data word is not located in one level of memory, the next lower level of memory is searched for same. Data words may be stored and translated or shifted through the various levels of memory without further error control encoding thereof. Fetching occurs in essentially the reverse manner of storing with the caveat that the single encloder used for storing is replaced by a decoder or error checking circuit.

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Huntington Valley, PA, United States of America

Kenneth Lindsay York