Seagate Technology Incorporated

Sk Hynix Memory Solutions Inc.

Kenneth John Evans

Jason Bellorado

Marcus Marrow

Heung S Kim

In certain embodiments, an apparatus may comprise a circuit configured to scale a phase control value from an external phase control resolution of an external clock frequency to an internal phase control resolution of an internal clock frequency to generate a target phase control value. The circuit may also determine a difference between a current phase control value and the target phase control value and determine a phase step value based on the difference. Further, the circuit may modify a current phase control value based on the phase step value and generate a phase controlled clock signal at the internal clock frequency using the modified phase control value. Additionally, the circuit may divide the phase controlled clock signal at the internal clock frequency to generate a phase controlled clock signal at the external clock frequency.

Wide frequency range clock generation with phase interpolation

In a high frequency mode a multiphase voltage-controlled oscillator (VCO) generates a first plurality of signals where each has the desired frequency and a different phase. A phase interpolator generates the signal at the desired frequency and the desired phase using a first plurality of signals. In a low frequency mode the VCO generates a second plurality of signals where each has a frequency which is a multiple of the desired frequency and a different phase. A multiphase frequency divider generates a third plurality of signals by dividing the frequency of the second plurality to the desired frequency while maintaining a phase relationship with the second plurality of signals. The phase interpolator generates the signal at the desired frequency and the desired phase using the third plurality.

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San Jose, CA, United States of America

Kenneth John Evans