Lucent Technologies Inc.

At&t Technologies, Inc.

Kenneth Gordon Moerschel

Janmye Sung

William A Possanza

Michael Allen Prozonic

Terry Chrapacz

A method is provided for optimizing the manufacturing yield of semiconductors. The method provides a backside dielectric layer which protects the semiconductor from electro-static discharge damage during manufacturing. The backside dielectric layer may be a nitride. The backside dielectric layer may be an oxide. The method also provides for optimized ion implantation flood gun current control.

Method for manufacturing gate oxide capacitors including wafer backside

A production control process includes a method of highlighting pinholes in a surface layer (37), such as a photoresist layer, of an article (31), such as a semiconductor wafer. The photoresist typically covers a dielectric base layer, such as an oxide layer (28). After a typical photoresist application, a typical test wafer (31) is submitted to an etching operation wherein pinhole sized defects in the photoresist layer (37) cause like defects to be etched through the underlying oxide layer (28). Thereafter, the wafer is submitted to an electrolytic treatment step, wherein the preferred process involves treating a positive photoresist in an alcohol with the wafer being cathodically coupled into the treating circuit. Activating light can be used simultaneously with the treatment. As an alternative, the photoresist is exposed prior to the electrolytic treatment of the wafer. During the electrolytic treatment the electrolytic fluid is activated in the immediate area of pinholes to act on the photoresist and dissolve the photoresist immediately about each of the pinholes. The resulting enlarged areas (46) of missing photoresist about each of the pinholes are readily recognized by visual inspection of the wafer (31) at the conclusion of the electrolytic treatment.

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Bethlehem, PA, United States of America

Kenneth Gordon Moerschel