Texas Instruments Corporation

Kenneth George MacLean

Marco Corsi

David John Baldwin

Tobin D Hagan

Richard K Hester

David Alexander Grant

Priscilla Enid Escobar-Bowser

Vishnu Ravinuthula

Suribhotla Rajasekhar

James Donald Quarfoot

Techniques are described for increasing the speed of a resistor-based charge pump for an active loop filter-based phase-locked loop (PLL). The techniques may include placing a low-resistance discharge path between respective nodes of a current source and sink in a charge pump, and selectively activating the low-resistance discharge path when the charge pump is turned off. The low-resistance discharge path may have a resistance that is lower than the resistance of other current paths between the respective nodes in the charge pump (e.g., current paths formed by the resistors included in the current source and sink of the charge pump), thereby reducing the amount of time needed to reset the charge on the respective nodes when the charge pump is turned off. In this way, the speed of a resistor-based charge pump may be increased, thereby allowing the overall speed of an active filter-based PLL to be increased.

High-speed resistor-based charge pump for active loop filter-based phase-locked loops

An output stage for an amplifier is provided. The amplifier generally provides for compensation of an error current generated by the base-collector (or gate-drain) capacitance of a common base (or gate) amplifier transistor. The stage accomplishes this by utilizing a three transistor Wilson current mirror to combine the error current with a mirrored bias current to reduce the load current on the common base (or gate) amplifier transistor.

High frequency amplifier linearization technique

Systems and methods are disclosed to enable determining thermal protection characteristics of an integrated circuit. In one embodiment, an integrated circuit includes a proportional to absolute temperature (PTAT) generator that provides a PTAT signal that varies as a function of temperature. Thermal protection control system provides an output signal indicative of a thermal protection condition based at least in part on the PTAT signal. A monitoring system that provides a path to enable selective measuring of at least one signal associated with operation of the thermal protection control system.

System and method for determining thermal shutdown characteristics

Systems and methods are provided for switching between power supply rail voltages for a differential driver device of a class G amplifier device. The amplifier device employs power MOSFETs to switch between supplying high supply voltages and low supply voltages to the power rails of the differential driver. The class G amplifier can be employed in driving an ADSL signal over a telephone line. A control device ramps the power supply rail voltage between low power supply states and high power supply states to mitigate noise and spikes that can be coupled to the output signal.

Power efficient ADSL central office downstream class G power switch

A bias device that modifies the bias of a device based on an input signal to the device. The device may have a fixed bias, and the bias device can be connected in parallel with the fixed bias. The device can be an amplifier, such as a linear amplifier or a class AB amplifier. The bias device can be configured to provide maximum bias during the device's crossover time period.

Bias system and method

The present invention provides a system for limiting energy levels across the output of a driver circuitry segment (). The system provides an output structure () adapted to drive an output load (). A transconductance component () is communicatively coupled to the output structure, and adapted to output a transconductance current that is proportional to the voltage across the output structure. A scaling component () is communicatively coupled to the output structure, and adapted to output a scaled current that is proportional, by some scaling factor, to the current through the output structure. A qualifying component () is communicatively coupled to the scaling component, and adapted to activate a trigger component () when the scaled current passes a first threshold. The trigger component is communicatively coupled to the qualifying component, the transconductance component, and the output structure. Responsive to activation from the qualifying component, the trigger component receives the transconductance current and accumulates charge, for an amount of time inversely proportional to the transconductance current's magnitude, and triggers shut off of the output structure when the accumulated charge passes a second threshold.

Versatile system for output energy limiting circuitry

The present invention provides an apparatus and method for operating driver amplifier ( ) of a line driver circuit ( ) from a lower set of power supply voltages, and from a higher set of voltages only when the amplitude of the signal ( ) being transmitted by the line driver ( ) requires it as determined by a comparator ( ). Advantageously, this reduces the power dissipation in the line driver ( ) by operating the line amplifier ( ) the majority of the time from the lower supply voltage. A delay circuit ( ) delays the signal to be amplified sufficient to allow the transitioning of the power supply voltages provided to the amplifier hysteresis of this power supply voltage switching may also be used to further reduce power dissipation.

Zero-overhead class G amplifier with threshold detection

A class 'AB' amplifier output stage has an active current bias source that provides base drive current to the output transistors that is proportional to the signal input voltage level. The output transistor currents are modulated with the input signal such that the quiescent supply current is reduced to a very small level.

Actively biased class AB output stage with low quiescent power, high output current drive and wide output voltage swing

An amplifier slew rate boosting scheme for use with an amplifier having a closed-loop gain equal to or very near unity has one plate of a compensation capacitor conventionally coupled to an internal high impedance gain node, but has the other plate of the compensation capacitor unconventionally driven with a buffered version of the input signal. The voltage appearing across the compensation capacitor in response to changes in the input signal is significantly less than that achieved using conventional compensation architectures where the other plate of the compensation capacitor is coupled to an AC ground. Since very little current is required to charge the compensation capacitor, the tail current generated by the input stage can be used instead to charge parasitic capacitances within the amplifier to increase the slew rate.

Amplifier slew rate boosting scheme

A single pair differential amplifier circuit (,) provides signal amplification across the full amplifier power-supply voltage range. The differential amplifier circuit (,) is coupled to the first rail (,) and the second rail (,) and has a differential input (,and,) for receiving a common-mode input voltage. A bias circuit (,) is coupled to the differential amplifier circuit (,) for applying a bias voltage to the differential pair of transistors (,and,) such that the bias circuit (,) controls the threshold voltage of the differential pair of transistors (,and,) in the response to the common-mode input voltage. The bias circuit (,) turns differential pair of transistors (,and,) on when the common-mode input voltage is in a range extending from the first supply voltage to the second supply voltage.

Growing community of inventors

Dallas, TX, United States of America

Kenneth George MacLean