Massachusetts Institute of Technology

National University of Singapore

Nanyang Technological University

New Silicon Corporation Pte Ltd

Kenneth Eng Kian Lee

Eugene A Fitzgerald

Soo Jin Chua

Joseph Sylvester Chang

Li Hong Zhang

Chuan Seng Tan

Kwang Hong Lee

Wei Shu

Cheng Yeow Ng

Siau Ben Chiah

Yong Qu

Yijing Chen

Fayyaz Moiz Singaporewala

Keith Cheng Yeow Ng

A method of fabricating a semiconductor device () is described. According to a described embodiment, the method comprises: (i) forming a III-V semiconductor material layer () comprising a substrate layer () and a device layer () attached to the substrate layer (); and (ii) forming an electrically conductive interlayer () to the device layer () prior to bonding the electrically conductive interlayer () to a partially processed CMOS device layer () having at least one transistor ().

Method for fabricating a semiconductor device including integrating III-V device and CMOS device, and the semiconductor device thereof

An integrated structure for an optoelectronic device and a method of fabricating an integrated structure for an optoelectronic device. The method comprises the steps of providing a complementary metal-oxide-semiconductor, CMOS, backplane comprising a driver circuit for the optoelectronic device; and providing a plurality of optical elements on the CMOS backplane, wherein the plurality of optical elements are based on a material system different from CMOS and are disposed in different device layers; wherein a first bonding dielectric is provided between the CMOS backplane and a first one of the different device layers for monolithic integration; and wherein a second bonding dielectric is provided between respective ones of the different device layers for monolithic integration, the second bonding dielectric being transparent.

Integrated structure for an optoelectronic device and method of fabricating the same

An integrated structure for an optoelectronic device and a method of fabricating an integrated structure for an optoelectronic device. The method comprises the steps of forming a plurality of epitaxial layers for optical elements on an epitaxial growth substrate, wherein the epitaxial layers are based on a material system different from complementary metal-oxide-semiconductor, CMOS; providing a handle wafer; performing a first dielectric bonding between the epitaxial growth substrate and the handle wafer such that an order of the epitaxial layers for the optical elements is reversed on the handle wafer compared to on the epitaxial growth substrate; removing the epitaxial growth substrate to expose one of the epitaxial layers on the handle wafer; processing the exposed one of the epitaxial layers for providing a common electrode layer for a first contact of each of the optical elements in the optoelectronic device; providing a CMOS integrated circuit, IC, wafer comprising a driver circuit for the optoelectronic device; and performing a second dielectric bonding between the handle wafer and the IC wafer such that an order of the epitaxial layers for the optical elements is reversed on the IC wafer compared to on the handle wafer.

Method of fabricating an integrated structure for an optoelectronic device and integrated structure for an optoelectronic device

Disclosed is a method of reducing surface unevenness of a semiconductor wafer (). In a preferred embodiment, the method comprises: removing a portion of a deposited layer and a protective layer thereon using a first slurry to provide an intermediate surface (). In the described embodiment, the deposited layer includes an epitaxial layer () and the protective layer includes a first dielectric layer (). The first slurry includes particles with a hardness level the same as or exceeding that of the epitaxial layer (). A slurry for use in wafer fabrication for reducing surface unevenness of a semiconductor wafer is also disclosed.

Method of reducing semiconductor substrate surface unevenness

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Singapore, Singapore

Kenneth Eng Kian Lee