Hitachi Global Storage Technologies Netherlands B.v.

Crocus-technology Sa

Kenneth Donald Mackay

Hardayal Singh Gill

Robert Fontana

Edward Hin Pong Lee

Neal Berger

Surya Narayan Pattanaik

Jinshan Li

Chie Ching Poon

Kouichi Nishioka

Virgile Javerliac

Jean-Pierre Nozieres

Sergey Kiselev

Andy Cuong Tran

The present invention provides methods and systems for repeatably creating and severing a short circuit to protect an electronic component from ESD. A short circuit may be formed between read sensor pads of a read sensor by depositing a shorting material on a magnetic head using a Laser Induced Forward Transfer (LIFT) process. The short circuit may be unshorted using a laser scan configured to sever the shorting material. In one embodiment, a shorting station may be provided to prevent spreading of the shorting material to undesired areas of the electronic component.

Method and device for repeatable shorting and unshorting of micro-electrical circuits

A memory unit with one field line; at least two thermally-assisted switching magnetic tunnel junction-based magnetic random access memory cells, each cell comprising a magnetic tunnel junction having an insulating layer disposed between a magnetic storage layer and a magnetic reference layer; wherein a selection transistor is connected to the magnetic tunnel junction; the one field line is used for passing a field current for switching a magnetization of the storage layer of the magnetic tunnel junctions of the cells. A magnetic memory device can be formed by assembling an array of the memory units, wherein at least two adjacent magnetic tunnel junctions of the cells can be addressed simultaneously by the field line. The memory unit and magnetic memory device have a reduced surface area. Magnetic memory devices with an increased density of memory units can be fabricated resulting in lower die fabrication cost and lower power consumption.

Shared line magnetic random access memory cells

A spin valve sensor in a read head has a spacer layer which is located between a self-pinned AP pinned layer structure and a free layer structure. The free layer structure is longitudinally stabilized by first and second hard bias layers which abut first and second side surfaces of the spin valve sensor. The AP pinned layer structure has an antiparallel coupling layer (APC) which is located between first and second AP pinned layers (AP) and (AP). The invention employs a resetting process for setting of the magnetic moments of the AP pinned layers by applying a field at an acute angle to the head surface in a plane parallel to the major planes of the layers of the sensor. The resetting process sets a proper polarity of each AP pinned layer, which polarity conforms to processing circuitry employed with the spin valve sensor.

Method for resetting pinned layer magnetization in a magnetoresistive sensor

Growing community of inventors

St Martin le Vinoux, France

Kenneth Donald Mackay