Pmc-sierra Us, Inc.

Kenneth David Wagner

Chunfang Xie

Bruce Scatchard

Scott Barrick

Philip Lyon Northcott

Kenneth William Ferguson

Bradley Burke

Michel Duchesneau

Aaron John Dennis

Steven Yu Peng Ng

A method of reducing current leakage in product variants of a semiconductor device, during the fabrication of the semiconductor device. The method involves using a semiconductor process technique for reducing current leakage in semiconductor product variants having unused circuits. A semiconductor device or integrated circuit fabricated by this method has reduced current leakage upon powering as well as during operation. The method involves semiconductor process technique that substantially increases the V(threshold voltage) of all transistors of a given type, such as all N-type transistors or all P-type transistors. The semiconductor process technique is also suitable for controlling other transistor parameters, such as transistor channel length, as well as other active elements, such as N-type resistors or P-type resistors, in unused circuits which affect leakage current as well as for unused circuits having previously applied semiconductor process techniques, such as a high Vcircuit, a standard Vcircuit, a low Vcircuit, and an SRAM cell Vcircuit.

Method of reducing current leakage in a product variant of a semiconductor device

A method of reducing current leakage in unused circuits performed during semiconductor fabrication and a semiconductor device or integrated circuit thereby formed. The method involves modifying a characteristic of at least one idle circuit that is unused in a product variant, to inhibit the circuit and reduce current leakage therefrom upon powering as well as during operation. The method can substantially increase the V(threshold voltage) of all transistors of a given type, such as all N-type transistors or all P-type transistors. The method is also suitable for controlling other transistor parameters, such as transistor channel length, as well as other active elements, such as N-type resistors or P-type resistors, in unused circuits which affect leakage current as well as for other unused circuits, such as a high Vcircuit, a standard Vcircuit, a low Vcircuit, and an SRAM cell Vcircuit.

Method of reducing current leakage in a device and a device thereby formed

The present disclosure provides systems and methods for testing an integrated circuit or device under test (DUT). A DUT of the present invention has a plurality of scan chains, a plurality of shift register elements each associated with a respective one of the scan chains, and a programmable switch matrix to configure shift register elements of a subset of the plurality of shift register elements to cause one shift register element of the subset to receive an interleaved test sequence, and to cause the interleaved test sequence to be shifted to other shift register elements in the subset, and to input deinterleaved test sequences to scan chains associated with the subset.

Reconfigurable scan chain connectivity to enable flexible device I/O utilization

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Vancouver, Canada

Kenneth David Wagner