Motorola Corporation

Freescale Semiconductor,inc.

Kenneth David Cornett

Wei-Yean Howng

E S Ramakrishnan

Feng Niu

Gary H Shapiro

David L Stolfa

Jaime Andres Borras

Robert E Stengel

David E Bockelman

Spyros Kyperountas

Branko L Avanic

Armando J Gonzalez

Vernon Anthony Allen

Douglas H Weisman

Babak Bastani

Oleg Andric

Jonathan F Gorrell

Minh T Pham

Ed S Ramakrishnan

Wayne Wen-Haw Chiou

Raymond M Caldwell

To reduce interference and increase battery life, a method and apparatus for transmitting location data within an ad-hoc communication system is provided herein. During operation, a portion of a beacon payload is reserved to broadcast location information (coordinates) for a node as well as other parameters that may be needed for location estimation. In addition to a node's location, an accuracy of the nodes location is also included within the beacon field. Because nodes will no longer have to awake outside their beacon transmit times to broadcast location information, battery life is extended. In addition, because nodes will no longer be transmitting location information outside their guaranteed time slot, system interference is also reduced.

Method and apparatus for transmitting location data within an ad-hoc communication system

Channelizing an applied current and applying a voltage to the channelized current enables switching of the applied current. According to the present invention, an applied current enters through a signal input carrier () and is channelized by a plurality of lateral potential wells created by a plurality of polysilicon fingers gates (). A first voltage is applied to a first set of the plurality of polysilicon finger gates () and a second differential voltage is applied to a second set of the plurality of polysilicon finger gates (), which results in a differential current flow among the lateral potential wells beneath the first and second sets of polysilicon fingers (), respectively. The differential current then flows to first and second signal output carriers ().

Rocking potential-well switch and mixer

A first type of MEMS resonator adapted to be fabricated on a SOI wafer is provided. A second type of MEMS resonator that is fabricated using deep trench etching and occupies a small area of a semiconductor chip is taught. Overtone versions of the resonators that provide for differential input and output signal coupling are described. In particular resonators suited for differential coupling that are physically symmetric as judged from center points, and support anti-symmetric vibration modes are provided. Such resonators are robust against signal noise caused by jarring. The MEMS resonators taught by the present invention are suitable for replacing crystal oscillators, and allowing oscillators to be integrated on a semiconductor chip. An oscillator using the MEMS resonator is also provided.

MEMS resonators and method for manufacturing MEMS resonators

A method for manufacturing a monolithic apparatus including a plurality of materials presenting a plurality of coplanar lands includes the steps of: (a) providing a substrate constructed of a first material and presenting a first land; (b) trenching the substrate to effect a cavity appropriately dimensioned to receive a semiconductor structure in an orientation presenting a second land generally coplanar with the first land; (c) depositing an accommodating layer constructed of a second material on the substrate and within the cavity to establish a workpiece; (d) depositing a composition layer constructed of a third material on the substrate; (e) selectively removing portions of the composition layer and the accommodating layer to establish the semiconductor structure; (f) depositing a cap layer constructed of a fourth material on the workpiece; and (g) removing the cap layer to establish a substantially planar face displaced from the plurality of lands by a predetermined distance.

Method for manufacturing a substantially integral monolithic apparatus including a plurality of semiconductor materials

Microelectromechanical resonators that can be fabricated on a semiconductor die by processes normally used in fabricating microelectronics (e.g., CMOS) circuits are provided. The resonators comprises at least two vibratable members that are closely spaced relative to a wavelength associated with their vibrating frequency, and driven to vibrate one-half a vibration period out of phase with each other, i.e. to mirror each others motion. Driving the vibratable members as stated leads to destructive interference effects that suppress leakage of acoustic energy from the vibratable members into the die, and improve the Q-factor of the resonator. Vibratable members in the form of vibratable plates that are formed by deep anisotropic etching one or more trenches in the die are disclosed. Embodiments in which two sets of vibratable plates are spaced by &frac12; the aforementioned wavelength to further suppress acoustic energy leakage, and improve the Q-factor of the resonator are disclosed.

High Q factor MEMS resonators

A method of interconnecting electrical terminations (,) of an integrated circuit die (,) to corresponding circuit traces (,) of a circuit carrying substrate (,). The die is placed in a cavity (,) in the substrate such that the electrical terminations on the die are aligned with corresponding circuit traces on the substrate, and so that the surfaces of the die and substrate are coplanar. A film (,) is vacuum laminated over the substrate and the die with heat and pressure. The film is then heated so that it flows to fill the spaces (,) between the die and sidewalls of the cavity, and is then cured. Excess film is then removed everywhere except that which is in the space between the die and the cavity walls. Electrical interconnections (,) are then plated up between the terminations and the circuit traces to bridge the distance between the terminations and the circuit traces. These interconnections are plated directly on the surface of those portions of the laminated film that lie between the sides of the die and of the cavity.

Method of interconnecting an embedded integrated circuit

A tuned low noise mixer (200) for use in radio frequency (RF) communications includes a transconductance amplifier (203) for amplifying an RF input signal (201). An impedance matching network (207) is formed using an impedance matching transformer with a tap connection (207') between primary and secondary coils. A mixer circuit (209) is then used for mixing a local oscillator signal (211) with the output of the impedance matching network (207) while a load network (213) provides a load to an output (215) of the mixer circuit (209). The invention provides a novel RF mixer topology that has a substantially low noise figure and a proportionally large power gain with low current drain for eliminating the need for an low noise amplifier (LNA) commonly used in RF mixer circuitry.

Tuned low power/low noise mixer

An integrable circuit inductor (220) is formed from a patterned conductive material (110) that has a major portion completely encapsulated by a material (221, 223) that is substantially electrically non-conductive, and that has a magnetic response at the operating frequency of the inductor (220). Preferably, an amorphous ferrite material is used for encapsulation, which provides a closed magnetic flux path for the inductor (220) when processing a signal at its operating frequency.

Integrable using amorphous magnetic material circuit inductor

A voltage variable capacitor (10) fabricated on a semiconductor substrate (11) includes a gate structure (62) and a well (22) under the gate structure (62). A heavily doped buried layer (15) and a heavily doped contact region (31) in the semiconductor substrate (11) form a low resistance conduction path from the well (22) to a surface (17) of the semiconductor substrate (11). A multi-finger layout is used to construct the voltage variable capacitor (10). In operation, when a voltage applied across the voltage variable capacitor (10) changes, the width of depletion region in the well (22) changes, and the capacitance of the voltage variable capacitor (10) varies accordingly.

Variable capacitor and method for fabricating the same

A high Q integrated inductor-capacitor (L-C) resonator (200) includes a planar inductor (201) having a plurality of turns and a serially connected first and second capacitor (205, 207) that is connected in parallel with the planar inductor (201). The first and second capacitors (205, 207) are positioned within at least one turn of the planar inductor (201) for reducing the parasitic interconnection resistance between the planar inductor (201) and first and second capacitor (205, 207) and also increasing the Q factor of the L-C resonator.

High Q integrated resonator structure

A method for forming a dielectric layer onto a substrate having a silicon surface includes initially depositing an oxidizable metal thin film onto the surface and thereafter depositing a thin film of a metal titanate compound, such as the zirconium titanate. The metal thin film is preferably formed of tantalum, titanium or zirconium. Following deposition of the metal titanate thin film, the metal titanate is annealed by heating in an oxidizing atmosphere at a temperature effective to recrystalize the titanate to increase the dielectric properties. During annealing, the metal film reacts with oxygen to form a metal oxide thin film intermediate the metal titanate thin film and the silicon surface. The oxidation of the metal thin film inhibits oxidation of the underlying silicon that would otherwise reduce the effective capacitance of the dielectric layer. The resulting coated substrate thus includes a dielectric layer that includes a thin film of the oxidized metal and an oxygen-annealed metal titanate thin film and exhibits an increased effective capacitance and improved dielectric properties, particularly in comparison to a comparable oxygen-annealed titanate films formed directly onto silicon surfaces.

Method for forming a titanate thin film on silicon, and device formed

A tuning circuit for a reference oscillator (200) including voltage variable capacitors (222, 224) in a back to back configuration and providing a control terminal for voltage controlled tuning of the reference oscillator (200). Also included in the tuning circuit is a modulation bias circuit for modulating the reference oscillator (200).

Wide band tunable and modulatable reference oscillator

An electronic circuit (300) includes first (302) and second (304) variable impedance devices coupled together. The first (302) and second (304) variable impedance devices are designed such that each exhibits a transfer function which is substantially inverse with respect to the other about the operating point of the electronic circuit. This provides for an electronic circuit which exhibits very low distortion characteristics. Circuits such as tunable filters, voltage-controlled oscillators (VCOs), receivers, etc. will benefit from using an electronic circuit (300) which exhibits such low distortion characteristics.

Variable impedance circuit providing reduced distortion

A semiconductor device (10), comprising a semiconductor substrate (12) having a layer of semiconductor material (14) deposited, coated or grown epitaxially as a single crystal or polysilicon on the surface of the substrate. The layer of material is also a semiconductor material, having a higher resistivity than the substrate it is deposited on. A dielectric layer (16) of a metal oxide is formed on the high resistivity layer (14), which is then covered with an amorphous layer (18) of a metal oxide dielectric. Zirconium titanate may be used as a metal oxide dielectric layer. A metal electrode (20) is formed on the amorphous layer (18) to form a Metal Insulator Semiconductor device. In an alternative configuration, the amorphous layer (18) may instead be placed between the high resistivity layer (14) and the dielectric layer (16), or a second amorphous layer (22) may be added between the high resistivity layer and the dielectric layer. When the device is electrically energized, a depletion region is formed in the high resistivity layer, creating a voltage variable capacitor.

Voltage variable capacitor having amorphous dielectric film

A voltage variable capacitor (10) has as the base substrate a silicon wafer with a layer of high resistivity semiconductor material on top of the substrate. An insulating layer (16) of a metal oxide having a dielectric constant greater than the dielectric constant of the semiconductors (12), such as zirconium titanate, is formed on top of the high resistivity layer, and a metal electrode (18) is formed on the insulating layer (16). When the electrode is energized, a depletion layer (20) is formed in the high resistivity layer. By varying the voltage applied to the electrode, the capacitance of the device is altered.

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Coral Springs, FL, United States of America

Kenneth David Cornett