International Business Machines Corporation

Kenneth D Schultz

Thomas Andrew Sartorius

Edward A Kantner

David W Nuechterlein

Kim E O'Donnell

Francis Edward Noel, Jr

Larry D Larsen

Thomas E Stammely

Harry I Linzer

Lee S Rogers

William E Coyle

Emmy M Wolters

A ring network of workstations interconnected on a single simplex ring is converted to duplex communications on the single ring by placing two transceivers in each workstation and adding a duplex conversion device between each workstation and its ring terminal box. One of the transceivers receives and retransmits signals in a clockwise direction around the ring; the other transceiver receives and retransmits signals in a counter-clockwise direction around the ring. The clockwise and counter-clockwise signals are superimposed on the ring but are isolated at the workstations by the duplex conversion device.

Full duplex communication on a single communication ring

An adapter cable and card for interfacing a personal computer to a local area network or other type of computer network which can operate on either of two types of media. The cable uses a symmetrical plug connector which mates with a receptacle connector on the adapter card in either a first position, or a second position which is 180 degrees rotated from the first position. In the first position, signal lines for one type of media are connected and signal lines for the other type of media are disconnected. In the second position, signal lines for the second type of media are connected, and signal lines for the first type are disconnected. The disconnection of the unused conductors allows the drive circuits for unused type of media to remain active without causing electromagnetic interference problems.

Reversible dual media adapter cable

The use of a high speed cache memory may be selectively controlled when a data processing task is interrupted in response to an interrupt signal, in order to prevent the interrupt from chilling the cache when insufficient performance enhancement will be realized. Disturbing the cache memory during performance of an interrupting task is prevented, thereby increasing the hit ratio of the cache when the interrupted task is resumed. Cache control information may be incorporated into a program status vector or program status word which is loaded into a program status register on occurrence of an interrupt.

Method and apparatus for controlling operation of a cache memory during

A reconfigurable set associative cache memory can be reconfigured from 2.sup.x way to 2.sup.y way set associative cache memory by effectively merging a predetermined number of least significant bits of the tag field of the main memory address with the line field of the main memory address. The effective merging is provided by logically merging least significant bits of the tag field with a reconfiguration designation. As a result, Y-X+1 different configurations of cache memory can be obtained using the Y-X least significant bits of the tag field merged with the cache memory address.

Reconfigurable multi-way associative cache memory

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Cary, NC, United States of America

Kenneth D Schultz