Cisco Technology, Inc.

Other

Kenn W Heinrich

Wayne Steven Sheldrick

Brian E Crookes

David Verbrugge

Keith B Gammie

James Au

Stephen Farley

Keith Gammie

Wayne Sheldrick

Systems and methods for combining a plurality of transport streams into a single transport stream for transmission to, e.g., a single frequency network via a satellite. Embodiments provide receiving a plurality of original, e.g., MPEG-compliant, data streams, where each original data stream has its own timing information, combining the plurality of original data streams into a single combined data stream which is also, e.g., MPEG compliant, modulating the single combined data stream for uplink to a satellite, receiving a downlink transmission from the satellite, where the downlink transmission includes the single combined data stream, de-combining the single combined data stream into the plurality of original data streams, and passing respective original data steams to, e.g., one or more DVB-T modulators for broadcast into a single frequency network.

Secure combined interoperable multiplexing

Disclosed are methods and systems of conveying and reproducing independent timebases in a network. The methods include distributing a common measurement clock and a common measurement clock counter to a plurality of cards in a master chassis in the network. Distributed master clock counters are locked to an external input signal in each of the plurality of cards. Periodic snapshots of a count value generated by the master clock counter are taken. A counter speed of the master clock counter is analyzed to create a future snapshot of the count value. The future snapshot of the count value is transmitted from the master chassis to at least one receiving chassis in the network. The association between master counters and slave counters is programmable by various means including modifying the routing of the snapshot packets.

Method and apparatus for conveying and reproducing multiple independent timebases using a shared reference clock, clock snapshots and a packet network

A video-processing architecture. In a specific embodiment, the architecture includes a first set of modules that accommodate certain functional traffic flowing between each module thereof. A broadcast module broadcasts video traffic to one or more of the first set of modules. In a more specific embodiment, the first set of modules and the broadcast module are configured to facilitate isolation of video traffic from functional traffic. The first set of modules includes plural modules having similar module architecture. The similar module of architecture includes a local memory in each of the plural modules, wherein the local memory stores video data associated with the video traffic. The local, memory includes a first memory bank for storing input pixel data and a second memory bank for storing reconstructed pixel data.

Video processing architecture

Systems and methods for de-combining a single combined data stream into a plurality of original data streams, where each original data stream has its own timing information, and passing respective original data steams to, e.g., one or more DVB-T modulators for broadcast into, e.g., a single frequency network. The original data streams and the single combined data stream may be, e.g., MPEG-compliant data streams.

Multiple transport receiver

An entropy coding apparatus. In a specific embodiment, the entropy coding apparatus includes a renormalization process and an encode-decision process that communicates with the renormalization process. The encode-decision process is adapted to run in parallel with the renormalization process without the renormalization process being nested therein. In a more specific embodiment, the entropy coding apparatus includes an entropy encoder that is H.264 compliant. The encode-decision process includes a first mechanism for pre-computing certain parameters to eliminate the need to nest the renormalization process within the encode-decision process. The renormalization process and the encode-decision process are components of a Context Adaptive Binary Arithmetic Coding (CABAC) module.

Entropy coding for video processing applications

A video processing system. In a specific embodiment, the system implements a system for processing macroblocks that includes a first module for processing a macroblock. A controller provides a first macroblock to the first module and provides a second macroblock to the first module, without waiting for the first module to complete processing of the first macroblock, when information is available to the first module to process the second macroblock. The first module may implement a pipelined processor that is adapted to process macroblocks simultaneously. Alternatively, the first module includes a first engine and a second engine, which may run in parallel as parallel engines. In a more specific embodiment, an entire image frame is treated as a single slice and processed by the system via a pipelined engines or parallel engines.

Parallel or pipelined macroblock processing

A variable bandwidth phase locked loop (PLL) includes renormalizable circuitry configured to allow a gain of the PLL to be changed without causing a disturbance, and a phase compensation circuit configured to adjust a final output phase of the PLL based on parameter changes supplied to the PLL.

Growing community of inventors

Oshawa, Canada

Kenn W Heinrich