Nec Corporation

Renesas Electronics Corporation

Kenji Oyachi

Takehito Inaba

Michihiko Ichinose

Tamaki Wada

Yuichi Morinaga

Tsuyoshi Kida

Reliability of a semiconductor device is improved. A semiconductor device has a base material of insulating material having a through hole, a terminal formed on a lower surface of the base material, and a semiconductor chip mounted on an upper surface of the base material in a face-up manner. The semiconductor device has a conductive member such as a wire, which electrically connects a pad of the semiconductor chip with an exposed surface of the terminal which is exposed from the through hole of the base material, and has a sealing body for sealing the conductive member, inside of the through hole of the base material, and the semiconductor chip. An anchor is provided in a region of the exposed surface of the terminal which is exposed from the through hole of the base material except for a joint portion joined with the conductive member.

Semiconductor device

Reliability of a semiconductor device is improved. A semiconductor device has a base material comprised of insulating material having a through hole, a terminal formed on a lower surface of the base material, and a semiconductor chip mounted on an upper surface of the base material in a face-up manner. Further, the semiconductor device has a conductive member such as a wire, which electrically connects a pad of the semiconductor chip with an exposed surface of the terminal which is exposed from the through hole of the base material, and has a sealing body for sealing the conductive member, inside of the through hole of the base material, and the semiconductor chip. An anchor means is provided in a region of the exposed surface of the terminal which is exposed from the through hole of the base material except for a joint portion joined with the conductive member such as the wire.

An electrode structure of a semiconductor element comprises a wiring 14 formed on one main surface of a semiconductor chip, an insulating film 15 formed on the wiring 14, at least one pad 3 located at a predetermined position on the insulating film 15 and a via-hole 16 formed in the insulating film 15. The via-hole 16 is filled with a metal material for electrically connecting the wiring 14 to the pad 3 and a contact area between the via-hole 16 and the pad 3 is 3% or more of a surface area of the pad 3 on the side of the via-hole 16. With such structure, it becomes possible to restrict occurrence of breakage and/or crack of the insulating film 15 during a time when a bonding wire 18 is connected to the pad 3 to thereby improve the fabrication yield.

Electrode structure of semiconductor element

In a semiconductor device, semiconductor chips are mounted on two surfaces of a die pad. A lower one of the semiconductor chips has a portion projecting outward from an upper one of the semiconductor chips. The semiconductor chips are connected to integrally molded external connection leads trough wiring members. The lower semiconductor chipping the outwardly projecting portion has, on its surface on the same side as an upper surface of the upper semiconductor chip, pads to be connected to the external connection leads. A semiconductor device lead frame and a method of manufacturing the same are also disclosed.

Semiconductor device, and semiconductor device with die pad and protruding chip lead frame and method of manufacturing the same

Internal electrodes and external lead wiring lines are formed on the front surface of a substrate of a semiconductor device, and solder bumps electrically connected to the external lead wiring lines via through holes are provided on the rear surface of the substrate. A first semiconductor chip is mounted on the surface of the substrate, and a second semiconductor chip is mounted on the rear surface of the substrate. Electrodes of the first semiconductor chip are connected to bonding pads at one side ends of the internal wiring lines, and electrodes of the second semiconductor chip are connected to the bonding pads at the other ends of the internal wiring lines and the external lead wiring lines with bonding wires passing through openings provided in the substrate. The solder bumps are formed with a height equal to or greater than the thickness of the second semiconductor chip so that, when the semiconductor device is mounted on an external mounting board or the like, a gap is formed between the substrate of the semiconductor device and the external mounting board by the height of the solder bumps themselves. The second semiconductor chip mounted on the rear surface of the substrate is accommodated in the gap.

Semiconductor device with reduced thickness

The present invention provides a method of determining an order of wire-bonding between a plurality of leads and a plurality of electrodes, the leads being arranged in two arrays, the electrodes being disposed intermediate between the two arrays of leads in a line on a semiconductor, the method including the steps of (a) surveying whether, if a first wire for connecting a first electrode to a first lead is extended beyond the first electrode, the extended first wire would intersect with a second wire for connecting a second electrode to a second lead, and (b) carrying out wire-boding for the first wire and then wire-bonding for the second wire if the extended first wire would intersect with the second wire.

Growing community of inventors

Tokyo, Japan

Kenji Oyachi