Mitsubishi Denki Kabushiki Kaisha

Mitsubishi Electric Corporation

Kenji Oota

Yoshihiro Yamaguchi

Futoshi Tokunoh

Kazunori Taguchi

Kazuhiro Morishita

Hiroshi Yamaguchi

Katsumi Satoh

Teruya Fukaura

Nobuhisa Nakashima

A pressure-contact semiconductor device () includes thermal buffer plates () and main electrode blocks () having flanges (), by which semiconductor substrate () having a pair of electrodes is sandwiched, disposed opposed to each side thereof, wherein the semiconductor substrate () is sealed in a gastight space by joining the flanges () to insulating container (). The semiconductor device () is configured such that the outermost periphery of the semiconductor substrate () is enclosed by hollow cylindrical insulator () fitted on outer peripheries of the main electrode blocks () in the gastight space with O-rings () fitted between the main electrode blocks () and the cylindrical insulator (), and sealed with reaction force from the O-rings ().

Pressure-contact semiconductor device

A P-type first diffusion layer is formed by diffusing P-type impurities on a front side of an N-type semiconductor substrate, and an N-type fourth diffusion layer which is shallower than the first diffusion layer is formed by diffusing N-type impurities on the front side, and a P-type second diffusion layer is locally formed in a ring-shape so as to be exposed on the lateral side by diffusing P-type impurities on the back side, and P-type impurities are diffused on the back side of the substrate and a P-type third diffusion layer is locally formed so as to be distributed inward from the second diffusion layer and not to be exposed to the lateral side, and the P-type second diffusion layer and the P-type third diffusion layer are formed in the two-stage structure, thereby various characteristics can be improved.

Pressed-contact type semiconductor device

A power semiconductor device comprises a semiconductor substrate, a gate electrode region (control electrode region), a cathode electrode region (first main electrode region), an anode electrode region (second main electrode region) and a guard ring. The semiconductor substrate has a side surface portion having a vertical portion formed substantially vertical to a main surface and a mesa portion connected to the vertical portion in a cross section. The gate electrode region is formed in a first main surface of the semiconductor substrate. The cathode electrode region is formed in part of a surface of the gate electrode region. The anode electrode region is formed in a second main surface of the semiconductor substrate. The guard ring is formed in the second main surface of the semiconductor substrate and annularly surrounds the anode electrode region. With this constitution provided is a power semiconductor device which makes the impurity diffusion length of the anode electrode region shallower in order to ensure reduction in recovery loss.

Power semiconductor device

A gate electrode () is formed on the outer peripheral step portion (') of a semiconductor substrate () so as to face a pressure-contact supporting block (), and a convex contacting portion () is formed on a predetermined position on the surface of the gate electrode to contact the pressure contact supporting block. The surface area of the gate electrode ranging from the inner periphery to a position adjacent to the convex contacting portion, is coated with an insulation film (). The convex contacting portion () is formed of a convex portion integral with the gate electrode or formed of another gate electrode (&#x2032;).

Pressure-contact type semiconductor device

Each of outermost segments (OMSG) and innermost segments (IMSG) is utilized as a dummy segment. A top surface of a protruding portion (OMPP, IMPP) of each of the outermost segments (OMSG) and the innermost segments (IMSG) is covered with an insulating layer (S+P), and a clearance (CL) is provided between a top surface of the insulating layer (S+P) and a bottom surface (BS) of a cathode strain relief plate. Each of all the other segments (SG) than the outermost and innermost segments has a protruding portion PP on which a cathode electrode (K-AL) is formed. A thickness (T) of the cathode electrode (K-AL) is determined so as to allow a top surface of the cathode electrode (K-AL) to be in contact with the bottom surface (BS) of the cathode strain relief plate.

Pressure contact type semiconductor device having dummy segment

A semiconductor device having a supporting member that reduces a resonance phenomenon. A pair of reinforcing members is fixed on a gate drive substrate with spacers interposed there between and upright portions of the pair of reinforcing members are fastened with screws on a side wall of a cathode flange. A spacer is fixed on the gate drive substrate and a projection of the spacer is inserted in an engaging member fixed on the bottom of the cathode fin electrode and thus fixed on the bottom of the cathode fin electrode. The pair of upright portions as the first and second supporting points and the projection of the spacer as the third supporting point stably support the gate drive substrate on the cathode fin electrode without freedom of rotation at the three positions arranged to surround an opening.

Semiconductor device with multiple supporting points

To make it possible to control turn-off operation even after switch over to transistor operation after commutation of the main current from cathode electrode to gate electrode in turn-off operation, a semiconductor device according to the invention comprises a first electrode, a first region of first conduction type provided on the first electrode, a second region of second conduction type provided on the first region, a third region and a fourth region of first conduction type respectively provided on the second region with a predetermined distance from each other to allow formation of a channel region on the second region, a fifth region of second conduction type provided on the third region, a second electrode provided on the fifth region, a gate electrode established in contact with the fourth region and a control electrode provided on a separate region between the third and fourth regions on the second region to control the channel region through an insulation layer.

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Tokyo, Japan

Kenji Oota