Matsushita Electric Industrial Co., Ltd.

Hitachi Koki Co., Ltd.

Matsushita Electronics Corporation

Kenji Okada

Masaaki Niwa

Yoshihiko Hirai

Juro Yasui

Kiyoshi Morimoto

Koichiro Yuki

Masaharu Udagawa

Yasuaki Terui

Atsuo Wada

Bunji Mizuno

Ichirou Nakayama

Kaoru Inoue

Kiyoyuki Morita

Shinji Odanaka

Shin Hashimoto

Masao Miyasaka

Shuichi Morio

Tsukasa Ogawa

Koyoshi Morimoto

Hiroshi Hishinuma

Gate voltage sweeping is performed on a semiconductor element using a multilayer insulating film including a lower insulating film whose thickness is to be obtained. A low voltage peak current mode is extracted from the resultant current-voltage characteristic, so that a peak voltage and a peak current amount in this mode are obtained. The thickness of the lower insulating film is obtained based on the obtained peak voltage or peak current amount and a previously-obtained correlation between the peak voltage or peak current amount and the thickness of the lower insulating film.

Method and apparatus for evaluating semiconductor device

A disk drive capable of producing the effect of a balancer even in a variety of reproduction and recording speeds without causing problems owing to the balancer, comprising a balancer in which magnetic ballsmovably accommodated inside a dampercancel any imbalance amount of a disk, and a detection sectionprovided near the clamperto detect the behavior of the magnetic balls

Disk drive including a balancer

A semiconductor device evaluation method includes the steps of measuring a total injected electron quantity before an insulating film causes a dielectric breakdown and obtaining the ratio between the total injected electron quantity and a total injected electron quantity before retention degradation is caused. In this method, using the ratio and the total injected electron quantity, the total injected electron quantity before the retention degradation is caused is calculated.

Method for evaluating and manufacturing a semiconductor device

A time it takes for a total leakage current (i.e., a total amount of B-mode stress induced leakage currents) flowing through respective MOS devices in a semiconductor integrated circuit to reach a predetermined reference level is estimated as an expected lifetime of the circuit.

Method of predicting lifetime of semiconductor integrated circuit and method for reliability testing of the circuit

A total injected electron quantity Q , which has reached a constant value against a variation in stress voltage applied to an insulating film for use in a semiconductor device, is obtained as a critical injected electron quantity Q . The total injected electron quantity Q is a total quantity of electrons injected into the insulating film before the film causes a dielectric breakdown. Thereafter, a time it should take for a total quantity of electrons, injected into the insulating film under actual operating conditions of the device, to reach the critical injected electron quantity Q is estimated as the expected lifetime of the insulating film.

Method for predicting lifetime of insulating film and method for reliability testing of semiconductor device

A stressing voltage is applied to a dielectric film (step S,). An A-SILC is monitored with stressing time and is plotted on a log-log scale (step S,). A straight line is applied to the plotting, a stressing time at which the line crosses a predetermined value of the A-SILC (a breakdown threshold) is obtained, and the obtained stressing time is predicted as the lifetime of the dielectric film (step S,).

Method and apparatus for lifetime prediction of dielectric breakdown

A P-type impurity layer, a silicon monocrystal film, a silicon oxide film and a crystal silicon film are successively formed on a semiconductor substrate by introducing appropriate functional gases on the semiconductor substrate, while irradiating the semiconductor substrate with ionizing radiation or light at a temperature lower than 250&deg; C. After forming a photoresist on the crystal silicon film at a temperature lower than 250&deg; C., the resultant semiconductor substrate is subjected to etching by using the photoresist as a mask, so as to form a gate electrode B out of the silicon oxide film and a gate insulating film out of the silicon oxide film. Then, the resultant semiconductor substrate is subjected to etching again by using the gate electrode as a mask, so as to form a channel region out of the P-type impurity layer. A source electrode and a drain electrode are formed on the respective sides of the gate electrode on the semiconductor substrate by introducing an appropriate functional. gas, while irradiating the semiconductor substrate with ionizing radiation or light at a temperature lower than 250&deg; C.

Production method for a semiconductor device

A P-type impurity layer, a silicon monocrystal film, a silicon oxide film and a crystal silicon film are successively formed on a semiconductor substrate by introducing appropriate functional gases on the semiconductor substrate, while irradiating the semiconductor substrate with ionizing radiation or light at a temperature lower than 250.degree. C. After forming a photoresist on the crystal silicon film at a temperature lower than 250.degree. C., the resultant semiconductor substrate is subjected to etching by using the photoresist as a mask, so as to form a gate electrode B out of the silicon oxide film and a gate insulating film out of the silicon oxide film. Then, the resultant semiconductor substrate is subjected to etching again by using the gate electrode as a mask, so as to form a channel region out of the P-type impurity layer. A source electrode and a drain electrode are formed on the respective sides of the gate electrode on the semiconductor substrate by introducing an appropriate functional gas, while irradiating the semiconductor substrate with ionizing radiation or light at a temperature lower than 250.degree. C.

By etching, a first groove and a second groove are formed in a silicon substrate. Surfaces of the side walls of these grooves have a surface orientation of (111). The first and second grooves sandwich a silicon thin plate therebetween, which is formed as a part of the silicon substrate. The silicon thin plate is sufficiently thin so as to act as a quantum well. Further, a pair of silicon oxide films acting as tunneling barriers are formed on the surfaces of the side walls of the silicon thin plate, thus forming a double barrier structure. In addition, a pair of polysilicon electrodes are formed and sandwich the double barrier structure. As a result, the structure of a resonance tunneling diode, which utilizes the resonance tunneling effect, is provided. Adding a third electrode to the above structure provides a resonance tunneling transistor.

Quantization functional device utilizing a resonance tunneling effect

A quantum device including a plate-like conductor part having a necking portion and a method of producing the same are disclosed. The method includes the steps of forming a first mask layer having a first strip portion on a conductor substrate; forming a second mask layer having a second strip portion on the conductor substrate; etching a region of the conductor substrate which is not covered with the first and second mask layers, by using the first and second mask layers as an etching mask, to form a plurality of first recess portions on a surface of the conductor substrate; selectively covering side faces of the plurality of first recess portions, and side faces of the first and second mask layers with a side wall film; selectively removing only the second mask layer, the first mask layer and the side wall film being left unremoved; etching another region of the conductor substrate which is not covered with the first mask layer and the side wall film, by using the first mask layer and the side wall film as an etching mask, to form a plurality of second recess portions on the surface of the conductor substrate; selectively removing part of another region of the surface of the conductor substrate which is not covered with the first mask layer and the side wall film; and removing the first mask layer and the side wall film, to form the plate-like conductor part having the necking portion at the conductor substrate.

Method of producing a quantum device which utilizes the quantum effect

A silicon substrate comprises at least two surfaces extending substantially along respective crystal faces of (111) crystal orientation of the silicon, the crystal faces of (111) crystal orientation crossing with each other, an electrically insulating layer formed by oxidizing the silicon substrate from the surfaces, and an electrically conductive portion insulated electrically by the electrically insulating layer from an outside of the silicon substrate.

Method of producing electrically insulated silicon structure

By etching, a first groove and a second groove are formed in a silicon substrate. Surfaces of the side walls of these grooves have a surface orientation of (111). The first and second grooves sandwich a silicon thin plate therebetween, which is formed as a part of the silicon substrate. The silicon thin plate is sufficiently thin so as to act as a quantum well. Further, a pair of silicon oxide films acting as tunneling barriers are formed on the surfaces of the side walls of the silicon thin plate, thus forming a double barrier structure. In addition, a pair of polysilicon electrodes are formed and sandwich the double barrier structure. As a result, the structure of a resonance tunneling diode, which utilizes the resonance tunneling effect, is provided. Adding a third electrode to the above structure provides a hot electron transistor. In the quantization functional devices having the above-described configuration, the satisfactory resonance effect is obtained due to a high crystallinity of the quantum well, a high potential barrier brought by the high quality silicon oxide films used as the tunneling barriers and a smooth interface between the quantum well and the tunneling barriers.

Method for producing quantization functional device utilizing a

For removing an unnecessary substance on a silicon substrate surface, a temperature of the unnecessary substance on the silicon substrate surface is not less than 750.degree. C. when the unnecessary substance is exposed to a gas including ozone.

Method for removing organic or inorganic contaminant from silicon

A quantum device including a plate-like conductor part having a necking portion made by forming a first mask layer having a first strip portion on a conductor substrate; forming a second mask layer having a second strip portion on the conductor substrate; etching a region of the conductor substrate which is not covered with the first and second mask layers, by using the first and second mask layers as an etching mask, to form a plurality of first recess portions on a surface of the conductor substrate; selectively covering side faces of the plurality of first recess portions, and side faces of the first and second mask layers with a side wall film; selectively removing only the second mask layer; etching another region of the conductor substrate which is not covered with the first mask layer and the side wall film, by using the first mask layer and the side wall film as an etching mask, to form a plurality of second recess portions on the surface of the conductor substrate; selectively removing part of another region of the surface of the conductor substrate which is not covered with the first mask layer and the side wall film; and removing the first mask layer and the side wall film, to form the plate-like conductor part having the necking portion.

Growing community of inventors

Suita, Japan

Kenji Okada