Anritsu Corporation

Kenji Nakatsugawa

Aiichi Katayama

Hitoshi Sekiya

Shoji Hiratsuka

Takafumi Nakamura

Transition state detecting device and measuring device using the same

A digital signal processing apparatus includes an A/D converter for converting an analog input signal to digital data, a memory having a plurality of memory blocks for storing the digital data, and a processor for processing digital data when read out from the memory. A first controller cyclically stores output digital data from the A/D converter in the blocks in the memory in a predetermined order and outputs the stored data to the processor every time a first command is generated by a first command generator. A second controller inhibits updating of a specific block designated by a second command generator, and outputs the data from the specific block to the processor every time a second command is generated by the second command generator.

Digital signal processing apparatus

A digital signal processing apparatus has: an A/D converter for A/D converting an input signal to be processed to a digital signal, an analog comparator for comparing the input signal with a predetermined threshold voltage and generating a comparison signal as a binary signal, a first input device for inputting at least binary data of a reference wave to be triggered, a discriminator for discriminating a coincidence between the binary signal from the analog comparator and the binary data entered at the first input device and generating a coincidence signal, a fetching section, triggered in response to the coincidence signal from the discriminator, for fetching the digital signal from the A/D converter, and a processor for performing predetermined processing of the digital signal fetched by the fetching device.

Waveform sequence trigger system

Digital wave observation apparatus includes first and second A/D converters to convert input signals of first and second channels into corresponding first and second digital signals. First and second delay circuits selectively delay the first and second digital signals, and a wave memory stores signals output from the first and second delay circuits for purposes of display. A first command device receives channel designating data corresponding to the first channel and desired delay value setting data, and provides first delay data to a first delay value setting device coupled to the first delay circuit. A second command device receives designating data corresponding to the second channel and desired delay value setting data, and provides second delay data to the first delay value setting device and a second delay value setting device coupled to the second delay circuit.

Digital wave observation apparatus

In a digital wave observation apparatus having an A/D converter for A/D converting an input signal, a trigger level setting device for setting a trigger level, a trigger signal generator for comparing the input signal with a set trigger level and generating a trigger signal, a wave memory for storing an A/D converted input signal in response to the trigger signal, and a display for displaying the input signal stored in the wave memory, the apparatus has a trigger level display device for displaying a horizontal line corresponding to a trigger level on the display irrespective of generation of the trigger signal.

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Kanagawa, Japan

Kenji Nakatsugawa