Denso Corporation

Kenji Kohno

Tetsuo Fujii

Hiroshi Fujimoto

Hiroyuki Ban

Hiroshi Maeda

Kazuhiko Sugiura

Shoji Mizuno

Hiroshi Imai

Mitsuhiro Saitou

Toshio Sakakibara

Makio Iida

Yoshiaki Nakayama

Yasuhiro Kitamura

Muneo Tamura

Atsushi Komura

Yumi Maruyama

Hirotsugu Funato

A method for dicing a semiconductor substrate includes: forming a reforming layer in the substrate by irradiating a laser beam on the substrate; forming a groove on the substrate along with a cutting line; and applying a force to the substrate in order to cutting the substrate at the reforming layer as a starting point of cutting. The groove has a predetermined depth so that the groove is disposed near the reforming layer, and the force provides a stress at the groove.

Dicing method for semiconductor substrate

A protecting apparatus includes a back-flow preventing Zener diode having a cathode connected directly to a control terminal of a main transistor formed on a semiconductor substrate. A protecting transistor has an output terminal connected to an anode of the back-flow preventing Zener diode and an input terminal connected to an input terminal of the main transistor. A protecting capacitor or Zener diode circuit is connected between a control terminal of the protecting transistor and the input terminal of the main transistor for allowing initial surge current, when caused based on a rapid surge, to flow into the control terminal of the protecting transistor. The protecting transistor, when turning on in response to the initial surge current, allows next surge current succeeding the initial surge current to flow into the control terminal of the main transistor via the back-flow preventing Zener diode. And, the main transistor, when turning on in response to the next surge current, allows late surge current succeeding the next surge current to flow therethrough.

Semiconductor device including a surge protecting circuit

A semiconductor device is provided having a power transistor structure. The power transistor structure includes a plurality of first wells disposed independently at a surface portion of a semiconductor layer; a deep region having a portion disposed in the semiconductor layer between the first wells; a drain electrode connected to respective drain regions in the first wells; a source electrode connected to respective source regions and channel well regions in the first wells, such that either the drain electrode or the source electrode is connected to an inductive load; and a connecting member for supplying the deep region with a source potential, where the connecting member is configurable to connect to the drain electrode when the drain electrode is connected to the inductive load and to connect to the source electrode when the source electrode is connected to said inductive load.

Power MOS transistor for absorbing surge current

Growing community of inventors

Gifu, Japan

Kenji Kohno