Hitachi, Ltd.

Hitachi Device Engineering Co., Ltd.

Other

Kenji Kitajima

Iwao Takemoto

Katsumi Matsumoto

Shigeo Nakamura

Hideki Nakagawa

Atsumu Iguchi

Masatoshi Furihata

Takeshi Ohashi

Kouki Sakai

Eiichiro Ito

Atsushi Hasegawa

Tetsuro Izawa

Tatsuhisa Fujii

A liquid crystal display device includes plural reflective electrodes supplied with a video signal, second light-blocking conductive films below the reflective electrodes with a first insulating layer therebetween, and a first light-blocking film below the second light-blocking conductive films so as to cover spacing between the second light-blocking conductive films. Each of the second light-blocking films is electrically connected to a corresponding one of the reflective electrodes, and is disposed to cover at least a portion of spacings between the corresponding one of the reflective electrodes and ones of the reflective electrodes adjacent thereto. A second insulating layer is interposed between the first and second light-blocking films, and its thickness is from 150 nm to 450 nm.

Reflective type liquid crystal display device

A liquid crystal display device includes a first substrate, a second substrate, a liquid crystal layer sandwiched between the first and second substrate, plural reflective electrodes arranged on a surface of the first substrate on a liquid crystal layer side thereof, each of the reflective electrodes being adapted to be supplied with a video signal; and plural light-blocking conductive films disposed below the reflective electrodes with an insulating layer interposed between the light-blocking films and the reflective electrodes. Each of the light-blocking films is electrically connected to a corresponding one of the reflective electrodes, and is disposed to cover at least a portion of spacings between the corresponding one of the reflective electrodes and ones of the reflective electrodes adjacent thereto.

Herein disclosed is an amplification circuit for realizing a substantially high sensitivity with a simple structure. The amplification circuit comprises: a first capacitor C1 for receiving a signal charge; a source-follower circuit for receiving a voltage of the first capacitor C1; an inversion amplification circuit including a source-earth type amplification MOSFET Q5 having its gate fed with the output signal of the source-follower circuit through a second capacitor C2; a feedback third capacitor C3 connected between the gate and drain of the amplification MOSFET Q5; and a switch element Q6 for feeding the gate of the amplification MOSFET Q5 with a predetermined bias voltage while the signal charge of the first capacitor C1 is being reset. The amplification MOSFET Q5 has its drain equipped as load means with a depletion type MOSFET Q4 having its gate and source connected, and the depletion type MOSFET Q4 has its source given the same potential as the substrate potential thereof.

Output circuit for a CCD with cascode depletion MOSFET loads and a

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Sanbu, Japan

Kenji Kitajima