Sumitomo Electric Industries, Limited

Kenji Kanbara

Keiji Wada

Taro Nishiguchi

Hironori Itoh

Kyoko Okita

Tsutomu Hori

So Tanaka

Tsubasa Honke

Ryosuke Kubota

Takaya Miyase

Takemi Terao

When a value obtained by dividing the number of the one or more second regions by a total of the number of the one or more first regions and the number of the one or more second regions is defined as a first defect free area ratio, a value obtained by dividing the number of the one or more fourth regions by a total of the number of the one or more third regions and the number of the one or more fourth regions is defined as a second defect free area ratio, and a value obtained by dividing the number of the one or more macroscopic defects by an area of the central region is defined as X cm, A is smaller than B, B is less than or equal to 4, X is more than 0 and less than 4, and a Formula 1 is satisfied.

Silicon carbide epitaxial substrate and method for manufacturing silicon carbide semiconductor device

A silicon carbide epitaxial film has a plurality of arc-shaped or annular basal plane dislocations and a plurality of threading dislocations. The plurality of threading dislocations have a first threading dislocation which is surrounded by the plurality of basal plane dislocations and a second threading dislocation which is not surrounded by the plurality of basal plane dislocations, when viewed from a direction perpendicular to a main surface. The plurality of basal plane dislocations and the first threading dislocation constitute an annular defect. An area density of the plurality of threading dislocations in the main surface is more than or equal to 50 cm. A value obtained by dividing an area density of the annular defect when viewed from the direction perpendicular to the main surface by the area density of the plurality of threading dislocations in the main surface is more than or equal to 0.00002 and less than or equal to 0.004.

A silicon carbide epitaxial substrate includes a silicon carbide single crystal substrate and a silicon carbide layer. The silicon carbide single crystal substrate has a first main surface. The silicon carbide layer is on the first main surface. The silicon carbide layer includes a second main surface opposite to a surface thereof in contact with the silicon carbide single crystal substrate. The second main surface has a maximum diameter of more than or equal to 100 mm. The second main surface includes an outer peripheral region which is within 3 mm from an outer edge of the second main surface, and a central region surrounded by the outer peripheral region. The central region has a haze of less than or equal to 75 ppm.

A silicon carbide semiconductor substrate includes a first main surface and a second main surface opposite to the first main surface. The first main surface has a maximum diameter of more than 100 mm, and the silicon carbide semiconductor substrate has a thickness of not more than 700 &#x3bc;m. A dislocation density is not more than 500/mmat an arbitrary region having an area of 1 mmin a region within 5 mm from an outer circumferential end portion of the first main surface toward a center of the first main surface. Accordingly, there is provided a silicon carbide semiconductor substrate allowing for suppression of generation of cracks.

Silicon carbide semiconductor substrate and method for manufacturing same

A silicon carbide semiconductor device includes a silicon carbide layer, an insulating layer, a Schottky electrode, and a reaction region. The silicon carbide layer includes a p type region in contact with a first main surface and an n type region in contact with the p type region and the first main surface. The insulating layer has a third main surface, a fourth main surface, and a side wall surface connecting the third main surface and the fourth main surface, and is in contact with the first main surface at the fourth main surface. The Schottky electrode is in contact with the first main surface and the side wall surface. The reaction region is in contact with the insulating layer, the Schottky electrode, and the p type region. The reaction region contains an element constituting the Schottky electrode, an element constituting the insulating layer, silicon, and carbon.

Growing community of inventors

Osaka, Japan

Kenji Kanbara